| #
52ca5145 |
| 09-Jun-2023 |
Luo Wei <lw@rock-chips.com> |
video/drm: rohm-bu18rl82: add 5ms delay after soft reset
Signed-off-by: Luo Wei <lw@rock-chips.com>
Change-Id: Ie34daf978869804644817153c5a00b2ae7f9079d
|
| #
ee32db20 |
| 25-Aug-2022 |
Luo Wei <lw@rock-chips.com> |
video/drm: rohm-bu18tl82/bu18rl82: reduce retry delay time
Signed-off-by: Luo Wei <lw@rock-chips.com>
Change-Id: Id749b3380eadee93c9a37841f9b7322bb5bf7e4b
|
| #
806b8544 |
| 08-Aug-2022 |
Luo Wei <lw@rock-chips.com> |
video/drm: rohm-bu18tl82/bu18rl82: improve init progress and add retry function if i2c failed
Signed-off-by: Luo Wei <lw@rock-chips.com>
Change-Id: Ia18bc6dc9706564ecbaca25f02c74cdc7348e7ae
|
| #
cb87f8ea |
| 05-Aug-2022 |
Guochun Huang <hero.huang@rock-chips.com> |
video/drm: BU18TL82-M/BU18RL82-M: print i2c access failure info
Signed-off-by: Guochun Huang <hero.huang@rock-chips.com>
Change-Id: I4230f8e6b27330a16742873e18956e1286e25a72
|
| #
b80a334a |
| 09-Jun-2022 |
Guochun Huang <hero.huang@rock-chips.com> |
video/drm: Add support for BU18TL82-M/BU18RL82-M
BU18TL82-M supports MIPI DSI and LVDS data
transmission by ROHM's original CDR (Clock Data
Recovery) technology. This chip is the serial interface
tr
video/drm: Add support for BU18TL82-M/BU18RL82-M
BU18TL82-M supports MIPI DSI and LVDS data
transmission by ROHM's original CDR (Clock Data
Recovery) technology. This chip is the serial interface
transmitter IC of the Clockless Link-BD series.
BU18TL82-M converts the MIPI DSI and LVDS data
stream into Clockless Link format transmit through 2
pairs of differential wires.
BU18RL82-M supports LVDS data transmission by
ROHM's original CDR (Clock Data Recovery) technology.
This chip is serial interface receiver IC of the Clockless
Link-BD series.
Change-Id: I0545eedcb4f76cebc56a59ab107eb24028ab71ce
Signed-off-by: Guochun Huang <hero.huang@rock-chips.com>
show more ...
|