| #
30bf5086 |
| 08-Jun-2025 |
William Wu <william.wu@rock-chips.com> |
usb: dwc2: gadget: support force b_session valid
Change-Id: I557280ba69c75a2a230981c22c11ff8e42cc5a94 Signed-off-by: William Wu <william.wu@rock-chips.com>
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| #
1a4f6af8 |
| 02-Mar-2020 |
Joseph Chen <chenjh@rock-chips.com> |
Merge branch 'next-dev' into thunder-boot
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| #
7808becd |
| 21-Nov-2019 |
Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> |
UPSTREAM: usb: dwc2: fix possible alignment issues
Since upgrading to gcc9, warnings are issued: "taking address of packed member of ‘...’ may result in an unaligned pointer value"
Fix this by conv
UPSTREAM: usb: dwc2: fix possible alignment issues
Since upgrading to gcc9, warnings are issued: "taking address of packed member of ‘...’ may result in an unaligned pointer value"
Fix this by converting dwc2_fifo_read to use unaligned access since packed structures may be on an unaligned address, depending on USB hardware.
Change-Id: I2cc286df6fda386353cd2d350534e8ae398e67bb Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Signed-off-by: Frank Wang <frank.wang@rock-chips.com> (cherry picked from commit 7dc0ac6015718f5fb66bb79bf53df19f64fbfeee)
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| #
24b360da |
| 17-Apr-2019 |
Fabrice Gasnier <fabrice.gasnier@st.com> |
UPSTREAM: usb: dwc2: fix gadget disconnect
This fixes a disconnect issue detected with fastboot command, when using dwc2 driver. - On u-boot side: uboot>$ fastboot 0 - On USB host PC side, few secon
UPSTREAM: usb: dwc2: fix gadget disconnect
This fixes a disconnect issue detected with fastboot command, when using dwc2 driver. - On u-boot side: uboot>$ fastboot 0 - On USB host PC side, few seconds after PC>$ fastboot reboot # Get stuck, uboot target never reboots
By enabling DEBUG_ISR logs, the bus suspend interrupt is seen before the PC command has been issued. When the USB bus suspend occurs, there's a HACK that disables the fastboot (composite driver). Here is the call stack upon USB bus suspend: - dwc2_handle_usb_suspend_intr() - dev->driver->disconnect() - composite_disconnect() - reset_config() - f->disable() - fastboot_disable() - usb_ep_disable(f_fb->out_ep); - usb_ep_disable(f_fb->in_ep); .. other disable calls.
When the resume interrupt happens, everything has been disabled, then nothing happens. fastboot command gets stuck on HOST side.
Remove original HACK, that disconnects the composite driver upon USB bus suspend. Implement disconnect detection instead: - check GINTSTS OTG interrupt - read GOTGINT register - check GOTGINT, SesEndDet bit (e.g. session end) This is inspired by what is implemented currently in Linux dwc2 driver.
Change-Id: I061bf19a7be2c85fdde3490ef792f18612de9c56 Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com> Reviewed-by: Marek Vasut <marex@denx.de> Signed-off-by: Frank Wang <frank.wang@rock-chips.com> (cherry picked from commit 7fd9f31c6bd13609da61b985cf8f5f65ebebd913)
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| #
b3c55b56 |
| 05-Feb-2018 |
Tom Rini <trini@konsulko.com> |
UPSTREAM: usb: dwc2: make casts of ep->dma_buf consistent
In most places in the code we cast this to an unsigned long, but in one place we cast to an unsigned int. For consistency and to fix a warn
UPSTREAM: usb: dwc2: make casts of ep->dma_buf consistent
In most places in the code we cast this to an unsigned long, but in one place we cast to an unsigned int. For consistency and to fix a warning on 64bit targets, always cast this to unsigned long. For the long term we should however change the declaration of dma_buf.
Conflicts: drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c
Change-Id: I56b7b6da2d716a9cd40ec4edbc928de433dfd4ca Cc: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: Lukasz Majewski <lukma@denx.de> Acked-by: Marek Vasut <marex@denx.de> Signed-off-by: Tom Rini <trini@konsulko.com> (cherry picked from commit a4d403290e32f95cfd254f2778e08f655ddd5a49)
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| #
8659d08d |
| 11-Sep-2018 |
Frank Wang <frank.wang@rock-chips.com> |
usb: dwc2: amend the maximum request length
Amend the maximum request length equate to the maximum transfer size of endpoind.
Change-Id: I926c23ddf347f33cf166c51c80d099441978ca7e Signed-off-by: Fra
usb: dwc2: amend the maximum request length
Amend the maximum request length equate to the maximum transfer size of endpoind.
Change-Id: I926c23ddf347f33cf166c51c80d099441978ca7e Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
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| #
6fff026f |
| 11-Feb-2018 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: usb: dwc2: fix compile warning
Change-Id: Ic0b190aa93378faf28147306d195fbc49c28c34d Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
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| #
80553dd1 |
| 31-Jul-2017 |
Seung-Woo Kim <sw0312.kim@samsung.com> |
UPSTREAM: usb: dwc2: Align size of invalidating dcache before starting DMA
During using dwc2 usb gadget, if usb message size is too small, following cache misaligned warning is shown:
CACHE: Mis
UPSTREAM: usb: dwc2: Align size of invalidating dcache before starting DMA
During using dwc2 usb gadget, if usb message size is too small, following cache misaligned warning is shown:
CACHE: Misaligned operation at range [bfdbcb00, bfdbcb04]
Align size of invalidating dcache before starting DMA to remove the warning.
Change-Id: Ibd9040be45da03174d63313e302b994720c7edd3 Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> (cherry picked from commit a939af0c748e2ea1eeb8cf47fa9771a95786de70)
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| #
a52e8dd4 |
| 08-Nov-2017 |
Frank Wang <frank.wang@rock-chips.com> |
usb: gadget: dwc2: avoid reset core before devices connected
Theoretically, the UDC register need not reconfig when GINTSTS.USBRst is set, and only do core reset if the devices was connected before.
usb: gadget: dwc2: avoid reset core before devices connected
Theoretically, the UDC register need not reconfig when GINTSTS.USBRst is set, and only do core reset if the devices was connected before. This change adds _connected_ flag to check the devices was really connected or not. As an optimization, reset device address to zero while GINTSTS.USBRst is set.
This patch fix usb connect failed when continuously perform the 'fastboot reboot-bootloader' command.
Change-Id: I6a78228e147d2274329d922ac3f3ffef19492e7e Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
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| #
9424f141 |
| 14-Jul-2016 |
Xu Ziyuan <xzy.xu@rock-chips.com> |
usb: dwc2 : invalidate dcache before starting DMA
Invalidate dcache before starting the DMA to ensure coherency. In case there are any dirty lines from the DMA buffer in the cache, subsequent cache-
usb: dwc2 : invalidate dcache before starting DMA
Invalidate dcache before starting the DMA to ensure coherency. In case there are any dirty lines from the DMA buffer in the cache, subsequent cache-line replacements may corrupt the buffer in memory while the DMA is still going on. Cache-line replacement can happen if the CPU tries to bring some other memory locations into the cache while the DMA is going on.
Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
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| #
e6a36528 |
| 25-Apr-2016 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://www.denx.de/git/u-boot-usb
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| #
4d5b6378 |
| 22-Apr-2016 |
Roger Quadros <rogerq@ti.com> |
usb: s3c-otg: Fix remaining bytes in debug messages
Remaining bytes means bytes that are not yet transferred and not the bytes that were transferred in the last transfer.
Reported-by: Lukasz Majews
usb: s3c-otg: Fix remaining bytes in debug messages
Remaining bytes means bytes that are not yet transferred and not the bytes that were transferred in the last transfer.
Reported-by: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: Roger Quadros <rogerq@ti.com> Tested-by: Steve Rae <srae@broadcom.com> [Test HW: bcm28155_ap board]
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| #
842769ea |
| 19-Apr-2016 |
Roger Quadros <rogerq@ti.com> |
usb: s3c-otg: Fix short packet for request size > ep.maxpacket
Request size can be greater than ep.packet and still end in a short packet. We need to tackle this case as end of transfer (if short_no
usb: s3c-otg: Fix short packet for request size > ep.maxpacket
Request size can be greater than ep.packet and still end in a short packet. We need to tackle this case as end of transfer (if short_not_ok is not set) as indicated in USB 2.0 Specification [1], else we get stuck up on certain protocols like fastboot.
[1] - USB2.0 Specification, Section 5.3.2 Pipes
Reported-by: Steve Rae <steve.rae@broadcom.com> Signed-off-by: Roger Quadros <rogerq@ti.com> Tested-by: Steve Rae <steve.rae@broadcom.com> Tested-by: Lukasz Majewski <l.majewski@samsung.com>
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| #
123b7017 |
| 18-Dec-2015 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-usb
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| #
e179cedd |
| 04-Dec-2015 |
Marek Vasut <marex@denx.de> |
usb: s3c-otg: Tweak the comments
The driver is actually for the Designware DWC2 controller. Tweak the comments in the driver to reflect this fact.
Signed-off-by: Marek Vasut <marex@denx.de>
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| #
507e677b |
| 04-Dec-2015 |
Marek Vasut <marex@denx.de> |
usb: s3c-otg: Rename remaining macros
The driver is actually for the Designware DWC2 controller. This patch renames the remaining S3C_* macros to match the DWC2 naming.
Signed-off-by: Marek Vasut <
usb: s3c-otg: Rename remaining macros
The driver is actually for the Designware DWC2 controller. This patch renames the remaining S3C_* macros to match the DWC2 naming.
Signed-off-by: Marek Vasut <marex@denx.de>
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| #
be5e4bdc |
| 04-Dec-2015 |
Marek Vasut <marex@denx.de> |
usb: s3c-otg: Rename sources to dwc2_*c
The driver is actually for the Designware DWC2 controller. This patch renames the local source files to dwc2_*c and adjusts the Makefile to use the new names.
usb: s3c-otg: Rename sources to dwc2_*c
The driver is actually for the Designware DWC2 controller. This patch renames the local source files to dwc2_*c and adjusts the Makefile to use the new names.
Signed-off-by: Marek Vasut <marex@denx.de>
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