| #
1a4f6af8 |
| 02-Mar-2020 |
Joseph Chen <chenjh@rock-chips.com> |
Merge branch 'next-dev' into thunder-boot
|
| #
24b360da |
| 17-Apr-2019 |
Fabrice Gasnier <fabrice.gasnier@st.com> |
UPSTREAM: usb: dwc2: fix gadget disconnect
This fixes a disconnect issue detected with fastboot command, when using dwc2 driver. - On u-boot side: uboot>$ fastboot 0 - On USB host PC side, few secon
UPSTREAM: usb: dwc2: fix gadget disconnect
This fixes a disconnect issue detected with fastboot command, when using dwc2 driver. - On u-boot side: uboot>$ fastboot 0 - On USB host PC side, few seconds after PC>$ fastboot reboot # Get stuck, uboot target never reboots
By enabling DEBUG_ISR logs, the bus suspend interrupt is seen before the PC command has been issued. When the USB bus suspend occurs, there's a HACK that disables the fastboot (composite driver). Here is the call stack upon USB bus suspend: - dwc2_handle_usb_suspend_intr() - dev->driver->disconnect() - composite_disconnect() - reset_config() - f->disable() - fastboot_disable() - usb_ep_disable(f_fb->out_ep); - usb_ep_disable(f_fb->in_ep); .. other disable calls.
When the resume interrupt happens, everything has been disabled, then nothing happens. fastboot command gets stuck on HOST side.
Remove original HACK, that disconnects the composite driver upon USB bus suspend. Implement disconnect detection instead: - check GINTSTS OTG interrupt - read GOTGINT register - check GOTGINT, SesEndDet bit (e.g. session end) This is inspired by what is implemented currently in Linux dwc2 driver.
Change-Id: I061bf19a7be2c85fdde3490ef792f18612de9c56 Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com> Reviewed-by: Marek Vasut <marex@denx.de> Signed-off-by: Frank Wang <frank.wang@rock-chips.com> (cherry picked from commit 7fd9f31c6bd13609da61b985cf8f5f65ebebd913)
show more ...
|
| #
acd7aca8 |
| 29-Mar-2019 |
Patrick Delaunay <patrick.delaunay@st.com> |
UPSTREAM: usb: dwc2: add support for STM32MP1
Add compatible "st,stm32mp1-hsotg" and associated driver data to manage the usb33d-supply and the ST specific register for VBus sensing.
Change-Id: If6
UPSTREAM: usb: dwc2: add support for STM32MP1
Add compatible "st,stm32mp1-hsotg" and associated driver data to manage the usb33d-supply and the ST specific register for VBus sensing.
Change-Id: If60971ebf415cb708b04af38c7b61d5321a13181 Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Lukasz Majewski <lukma@denx.de> Signed-off-by: Frank Wang <frank.wang@rock-chips.com> (cherry picked from commit 931e9d7aa7228867eec7e33fd45718e6018cc96d)
show more ...
|
| #
38b0d574 |
| 29-Mar-2019 |
Patrick Delaunay <patrick.delaunay@st.com> |
UPSTREAM: usb: dwc2_udc_otg: Read MAX_HW_ENDPOINT from HWCFG4 register
Some DWC2 ip variant doesn't use 16 hardware endpoint as hardcoded in the driver. Bits INEps [29:26] of HWCFG4 register allows
UPSTREAM: usb: dwc2_udc_otg: Read MAX_HW_ENDPOINT from HWCFG4 register
Some DWC2 ip variant doesn't use 16 hardware endpoint as hardcoded in the driver. Bits INEps [29:26] of HWCFG4 register allows to get this information.
Change-Id: I22f88ef7ee2749cce3c93f5c8a455a1de165b9dd Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Lukasz Majewski <lukma@denx.de> Signed-off-by: Frank Wang <frank.wang@rock-chips.com> (cherry picked from commit 5bd97e80730bdda59656ca927d67d62fb2a4ecb6)
show more ...
|
| #
5c4beedb |
| 29-Mar-2019 |
Patrick Delaunay <patrick.delaunay@st.com> |
UPSTREAM: usb: dwc2: Add force-b-session-valid support
Handle "force-b-session-valid" property from DT.
Change-Id: I5a0bf871506257b449897cb67732fef430704134 Signed-off-by: Patrick Delaunay <patrick
UPSTREAM: usb: dwc2: Add force-b-session-valid support
Handle "force-b-session-valid" property from DT.
Change-Id: I5a0bf871506257b449897cb67732fef430704134 Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Lukasz Majewski <lukma@denx.de> Signed-off-by: Frank Wang <frank.wang@rock-chips.com> (cherry picked from commit 0fdd0bc621f060fcf60fd4ba48a2a32f338ffeac)
show more ...
|
| #
5b2bcb4f |
| 11-Sep-2018 |
Frank Wang <frank.wang@rock-chips.com> |
usb: dwc2: fix the maximum dieptsizn/doeptsizn
The maximum transfer size supported should be 2^19 bytes from Table 5-79 (P372) of the DWC OTG Databook V3.10.
Change-Id: I258b6c2119270fa2f31453af86f
usb: dwc2: fix the maximum dieptsizn/doeptsizn
The maximum transfer size supported should be 2^19 bytes from Table 5-79 (P372) of the DWC OTG Databook V3.10.
Change-Id: I258b6c2119270fa2f31453af86f7eb179359e171 Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
show more ...
|
| #
a52e8dd4 |
| 08-Nov-2017 |
Frank Wang <frank.wang@rock-chips.com> |
usb: gadget: dwc2: avoid reset core before devices connected
Theoretically, the UDC register need not reconfig when GINTSTS.USBRst is set, and only do core reset if the devices was connected before.
usb: gadget: dwc2: avoid reset core before devices connected
Theoretically, the UDC register need not reconfig when GINTSTS.USBRst is set, and only do core reset if the devices was connected before. This change adds _connected_ flag to check the devices was really connected or not. As an optimization, reset device address to zero while GINTSTS.USBRst is set.
This patch fix usb connect failed when continuously perform the 'fastboot reboot-bootloader' command.
Change-Id: I6a78228e147d2274329d922ac3f3ffef19492e7e Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
show more ...
|
| #
47117882 |
| 14-Jul-2016 |
Xu Ziyuan <xzy.xu@rock-chips.com> |
usb: dwc2-otg: adjust fifo size via platform data
The total FIFO size of some SoCs may be different from the existen, this patch supports fifo size setting from platform data.
Signed-off-by: Ziyuan
usb: dwc2-otg: adjust fifo size via platform data
The total FIFO size of some SoCs may be different from the existen, this patch supports fifo size setting from platform data.
Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
show more ...
|
| #
123b7017 |
| 18-Dec-2015 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-usb
|
| #
507e677b |
| 04-Dec-2015 |
Marek Vasut <marex@denx.de> |
usb: s3c-otg: Rename remaining macros
The driver is actually for the Designware DWC2 controller. This patch renames the remaining S3C_* macros to match the DWC2 naming.
Signed-off-by: Marek Vasut <
usb: s3c-otg: Rename remaining macros
The driver is actually for the Designware DWC2 controller. This patch renames the remaining S3C_* macros to match the DWC2 naming.
Signed-off-by: Marek Vasut <marex@denx.de>
show more ...
|
| #
f4d9bd06 |
| 04-Dec-2015 |
Marek Vasut <marex@denx.de> |
usb: s3c-otg: Rename local headers to dwc2_*h
The driver is actually for the Designware DWC2 controller. This patch renames the local header files to dwc2_*h and adjusts the sources to use the new n
usb: s3c-otg: Rename local headers to dwc2_*h
The driver is actually for the Designware DWC2 controller. This patch renames the local header files to dwc2_*h and adjusts the sources to use the new names.
Signed-off-by: Marek Vasut <marex@denx.de>
show more ...
|