| 9082eeac | 08-Apr-2011 |
Andy Fleming <afleming@freescale.com> |
phylib: Add a bunch of PHY drivers from tsec
The tsec driver had a bunch of PHY drivers already written. This converts them all into PHY Lib drivers, and serves as the first set of PHY drivers for P
phylib: Add a bunch of PHY drivers from tsec
The tsec driver had a bunch of PHY drivers already written. This converts them all into PHY Lib drivers, and serves as the first set of PHY drivers for PHY Lib.
While doing that, cleaned up a number of magic numbers (though not all of them, as PHY vendors like to keep their numbers as magical as possible). Also, noticed that almost all of the vitesse/cicada PHYs had the same config/parse/startup functions, so those have been collapsed into one.
Signed-off-by: Andy Fleming <afleming@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: Detlev Zundel <dzu@denx.de>
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| 443ce4ac | 16-Jul-2009 |
Prafulla Wadaskar <prafulla@marvell.com> |
net: phy: bugfixes: mv88E61xx multichip addressing support
With these fixes, this driver works properly for multi chip addressging mode
Bugfixes: 1. Build error fixed for function mv88e61xx_busychk
net: phy: bugfixes: mv88E61xx multichip addressing support
With these fixes, this driver works properly for multi chip addressging mode
Bugfixes: 1. Build error fixed for function mv88e61xx_busychk_multic-fixed 2. PHY dev address error detection- fixed 3. wrong busy bit was refered in function mv88e61xx_busychk -fixed 4. invalid data read ptr was refered for RD_PHY in case of multichip addressing mode -fixed
The Multichip Address mode is tested with RD6281A board having MV88E6165 switch on it
Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
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