| #
5bd3c538 |
| 18-Mar-2020 |
Christophe Roullier <christophe.roullier@st.com> |
UPSTREAM: net: dwc_eth_qos: implement reset-gpios for stm32
Add management of property "reset-gpios" in the node identified by "phy-handle" to configure any GPIO used to reset the PHY.
Signed-off-b
UPSTREAM: net: dwc_eth_qos: implement reset-gpios for stm32
Add management of property "reset-gpios" in the node identified by "phy-handle" to configure any GPIO used to reset the PHY.
Signed-off-by: Christophe Roullier <christophe.roullier@st.com> Reviewed-by: Patrice CHOTARD <patrice.chotard@st.com> Reviewed-by: Patrick DELAUNAY <patrick.delaunay@st.com> Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Signed-off-by: David Wu <david.wu@rock-chips.com> Change-Id: Ia7dfcafc2e2f90a5ca48205dd2562fb62a3d6d84
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| #
369f6fd3 |
| 18-Dec-2019 |
Marek Vasut <marex@denx.de> |
UPSTREAM: net: dwc_eth_qos: Pass -1 to phy_connect() to scan for all PHYs
PHY address 0 is a valid PHY address, to scan for all PHYs, pass -1 to phy_connect(). Passing 0 used to work before be accid
UPSTREAM: net: dwc_eth_qos: Pass -1 to phy_connect() to scan for all PHYs
PHY address 0 is a valid PHY address, to scan for all PHYs, pass -1 to phy_connect(). Passing 0 used to work before be accident, but does no longer.
Signed-off-by: Marek Vasut <marex@denx.de> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Patrice Chotard <patrice.chotard@st.com> Cc: Patrick Delaunay <patrick.delaunay@st.com> Cc: Ramon Fried <rfried.dev@gmail.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Ramon Fried <rfried.dev@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: David Wu <david.wu@rock-chips.com> Change-Id: Ibc8a780b8a7e1be6f827ca901d0b1f2b384ca627
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| #
1e8d5d80 |
| 01-Aug-2019 |
Patrick Delaunay <patrick.delaunay@st.com> |
UPSTREAM: net: dwc_et_qos: update weak function board_interface_eth_init
Align the board and driver prototype for board_interface_eth_init to avoid execution issue (the interface_type parameter is d
UPSTREAM: net: dwc_et_qos: update weak function board_interface_eth_init
Align the board and driver prototype for board_interface_eth_init to avoid execution issue (the interface_type parameter is defined as int or phy_interface_t).
To have a generic weak function (it should be reused by other driver) I change the prototype to use directly udevice.
This prototype is added in netdev.h to allow compilation check and avoid warning when compiling with W=1 on file board/st/stm32mp1/stm32mp1.c
warning: no previous prototype for 'board_interface_eth_init'\ [-Wmissing-prototypes] int board_interface_eth_init(int interface_type, .... ^~~~~~~~~~~~~~~~~~~~~~~~
Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: David Wu <david.wu@rock-chips.com> Change-Id: I7301e49ef8e51ecdde0629a69d7bcc07465952d0
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| #
8aaada72 |
| 01-Aug-2019 |
Patrick Delaunay <patrick.delaunay@st.com> |
UPSTREAM: net: dwc_eth_qos: Change eqos_ops function to static
This patch solves many warnings when compiling with W=1: warning: no previous prototype for '....' [-Wmissing-prototypes]
Signed-off-b
UPSTREAM: net: dwc_eth_qos: Change eqos_ops function to static
This patch solves many warnings when compiling with W=1: warning: no previous prototype for '....' [-Wmissing-prototypes]
Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-By: Ramon Fried <rfried.dev@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: David Wu <david.wu@rock-chips.com> Change-Id: Ice01d9d56324b450f313a4a74e5039581e20a08e
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| #
7a4c4edd |
| 17-May-2019 |
Christophe Roullier <christophe.roullier@st.com> |
UPSTREAM: net: dwc_eth_qos: add Ethernet stm32mp1 support
Synopsys GMAC 4.20 is used. And Phy mode for eval and disco is RMII with PHY Realtek RTL8211 (RGMII) We also support some other PHY config o
UPSTREAM: net: dwc_eth_qos: add Ethernet stm32mp1 support
Synopsys GMAC 4.20 is used. And Phy mode for eval and disco is RMII with PHY Realtek RTL8211 (RGMII) We also support some other PHY config on stm32mp157c PHY_MODE (MII,GMII, RMII, RGMII) and in normal, PHY wo crystal (25Mhz and 50Mhz), No 125Mhz from PHY config
Signed-off-by: Christophe Roullier <christophe.roullier@st.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: David Wu <david.wu@rock-chips.com> Change-Id: Ie696f22dd260f6712c61744c60dc9d5a64737a5a
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| #
b491b498 |
| 18-Jun-2019 |
Jon Lin <jon.lin@rock-chips.com> |
UPSTREAM: wait_bit: use wait_for_bit_le32 and remove wait_for_bit
wait_for_bit callers use the 32 bit LE version
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Daniel Schwie
UPSTREAM: wait_bit: use wait_for_bit_le32 and remove wait_for_bit
wait_for_bit callers use the 32 bit LE version
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Change-Id: I638846de7db29711fb7c778cc8304b507de057fe Signed-off-by: Jon Lin <jon.lin@rock-chips.com> (cherry picked from commit 48263504c8d501678acaa90c075f3f7cda17c316) Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
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| #
90aa625c |
| 16-Sep-2017 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
treewide: replace with error() with pr_err()
U-Boot widely uses error() as a bit noisier variant of printf().
This macro causes name conflict with the following line in include/linux/compiler-gcc.h
treewide: replace with error() with pr_err()
U-Boot widely uses error() as a bit noisier variant of printf().
This macro causes name conflict with the following line in include/linux/compiler-gcc.h:
# define __compiletime_error(message) __attribute__((error(message)))
This prevents us from using __compiletime_error(), and makes it difficult to fully sync BUILD_BUG macros with Linux. (Notice Linux's BUILD_BUG_ON_MSG is implemented by using compiletime_assert().)
Let's convert error() into now treewide-available pr_err().
Done with the help of Coccinelle, excluing tools/ directory.
The semantic patch I used is as follows:
// <smpl> @@@@ -error +pr_err (...) // </smpl>
Change-Id: I921807c1770d36a91e692c48ab477558bb2ed0b8 Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Simon Glass <sjg@chromium.org> [trini: Re-run Coccinelle] Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> (cherry picked from commit 9b643e312d528f291966c1f30b0d90bf3b1d43dc)
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| #
a821c4af |
| 17-May-2017 |
Simon Glass <sjg@chromium.org> |
dm: Rename dev_addr..() functions
These support the flat device tree. We want to use the dev_read_..() prefix for functions that support both flat tree and live tree. So rename the existing function
dm: Rename dev_addr..() functions
These support the flat device tree. We want to use the dev_read_..() prefix for functions that support both flat tree and live tree. So rename the existing functions to avoid confusion.
In the end we will have:
1. dev_read_addr...() - works on devices, supports flat/live tree 2. devfdt_get_addr...() - current functions, flat tree only 3. of_get_address() etc. - new functions, live tree only
All drivers will be written to use 1. That function will in turn call either 2 or 3 depending on whether the flat or live tree is in use.
Note this involves changing some dead code - the imx_lpi2c.c file.
Signed-off-by: Simon Glass <sjg@chromium.org>
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| #
d8c4eb60 |
| 07-Nov-2016 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-net
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| #
ba4dfef1 |
| 21-Oct-2016 |
Stephen Warren <swarren@nvidia.com> |
net: add driver for Synopsys Ethernet QoS device
This driver supports the Synopsys Designware Ethernet QoS (Quality of Service) a/k/a eqos IP block, which is a different design than the HW supported
net: add driver for Synopsys Ethernet QoS device
This driver supports the Synopsys Designware Ethernet QoS (Quality of Service) a/k/a eqos IP block, which is a different design than the HW supported by the existing designware.c driver. The IP supports many options for bus type, clocking/reset structure, and feature list. This driver currently supports the specific configuration used in NVIDIA's Tegra186 chip, but should be extensible to other combinations quite easily, as explained in the source.
Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> # V1 Acked-by: Joe Hershberger <joe.hershberger@ni.com>
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