mtd: spi-nor-ids: Support new devicesBY25FQ256ESSIG, ZB25VQ64, ZB25VQ128, ZB25LQ128.Change-Id: Idbe05809836e16ce6e3b0e49bbe06e3acd0fccc7Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
mtd: spi-nor-ids: Support en25qh128 dual/quad modeChange-Id: I3bd9018ee76d007fa8ad1e3f93985fee1e5e6b92Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
mtd: spi-nor-ids: Support BY25FQ256ESSIGChange-Id: I87fcf34a01881018655aabd5153ff2ef5d1e2c5bSigned-off-by: Jon Lin <jon.lin@rock-chips.com>
mtd: spi-nor-ids: Support PY25F128LAChange-Id: I153ac484dfcf081d1912be7a2d0ee27c3c6b074fSigned-off-by: Jon Lin <jon.lin@rock-chips.com>
mtd: spi-nor-ids: support ZB25Q256AChange-Id: Ie554e1972716e3c9aa7768de01d50493a8695264Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
mtd: spi-nor-ids Support XM25QU256CChange-Id: I8c58611d30e63a1e5cd974f7e365803d034bab42Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
mtd: spi-nor-ids: support new devicesen25qx64a, PY25Q256LC, BY25Q64ESSIGChange-Id: Ic51fe76ca381dbac8b0e45e2fcfdb3ce6ff6b966Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
mtd: spi-nor-ids Support xt25q256Change-Id: Ib990fc028978f9b549c5d12fb3fb1c406858abc8Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
mtd: spi: Support auto mergeIn order to enable dual NOR flash users to experience double thecapacity and avoid frequent switching between two NOR flash devices,the two NOR flash devices are virtu
mtd: spi: Support auto mergeIn order to enable dual NOR flash users to experience double thecapacity and avoid frequent switching between two NOR flash devices,the two NOR flash devices are virtualized into one device, whichI name it auto_merge tech.Change-Id: I5edd7cde0481b1de6a35fce7ac67068889ff5ffeSigned-off-by: Jon Lin <jon.lin@rock-chips.com>
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mtd: spi-nor-ids: Support BFPT_DWORD15_QER_SR2_BIT1_WRQE is bit 1 of the status register 2. Status register 1 is read usingRead Status instruction 05h. Status register 2 is read using instruction
mtd: spi-nor-ids: Support BFPT_DWORD15_QER_SR2_BIT1_WRQE is bit 1 of the status register 2. Status register 1 is read usingRead Status instruction 05h. Status register 2 is read using instruction35h, and status register 3 is read using instruction 15h. QE is set viawrite Status Register instruction 31h with one data byte where bit 1 isone. It is cleared via Write Status Register instruction 31h with onedata byte where bit 1 is zero.Change-Id: I4bfab50210dc8dbc7818c41d15b516be49640706Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
mtd: spi-nor-ids: support w25q01jvfimChange-Id: I9e83557b610404c59245ebd4dee8e14bd2e1f79fSigned-off-by: Jon Lin <jon.lin@rock-chips.com>
mtd: spi-nor-ids: Issue the flash JEDEC idChange-Id: I32e1d1ea901cf63bda7a07626e0d57b3c6bb48f6Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
ntd: spi-nor-ids: Fix gd25lq256d to 4B codesChange-Id: I4f3b28cc6c79eef619b5b7e371590dd342334371Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
mtd: spi-nor-ids: support PY25Q128LAChange-Id: I270ad726d01b5c37902c42832d185fcaaa7ee9f0Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
mtd: spi-nor-core: Add DTR protocolChange-Id: I73a803270a5a1856371d6894d243e9e5878a9067Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
mtd: spi-nor-ids: support new devicesSync with the spi-nor-ids.c with the UPSTREAM code.Change-Id: Ibc7fb397c6967469b3f54384e547d12593b426c5Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
mtd: spi-nor-ids: support new devicesen25qx128a, gd55lb01ge, FM25Q256I3Change-Id: I27e045e8a7055e3f485314c321d5a98c79e832b2Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
mtd: spi-nor-ids: support new devicesPY25Q256HB, PY25Q64HA, en25qh256a, en25qx256aChange-Id: Ie17a566dd7bfb9d7856c0922c57677c4a78b56acSigned-off-by: Jon Lin <jon.lin@rock-chips.com>
mtd: spi-nor-ids: support New devicesgd55b01geChange-Id: I60f4b39da17cfb39962929e328ee99a814f6bd59Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
mtd: spi-nor-ids: support xt25q64d xt25q128dChange-Id: I1135ffcc80f11ac02db82e0b6e1bbc1b0b02fd88Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
mtd: spi-nor-ids: support xt25f256bChange-Id: I5e628e592476cc7f868bec94a3fa01c9a3213ef7Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
mtd: spi-nor-ids: support NM25Q128EVBChange-Id: Ic77028b0e2a30d1b6791d667e57da25e7a15b3f5Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
mtd: spi: Fix SPI_MTD dependencySigned-off-by: Kever Yang <kever.yang@rock-chips.com>Change-Id: I1f584c792e0327987c64bfed9eba8814a90153ee
mtd: spi-nor-ids: support New devicesP25Q64H, P25Q128HChange-Id: Iadf4c615cafd5e94cbdce1f02433db44cdcbbbecSigned-off-by: Jon Lin <jon.lin@rock-chips.com>
mtd: spi-nor-ids: support New devicesXM25QH256C, BY25Q256FSEIGChange-Id: I626d3c7fd17b13d76903eaaecf4d872dfa27e145Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
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