UPSTREAM: drivers: nand: brcmnand: add parameter parameter-page-big-endian

The parameter page isn't always in big endian, so we add
an option to choose the endiannes of the parameter page.

Change-I

UPSTREAM: drivers: nand: brcmnand: add parameter parameter-page-big-endian

The parameter page isn't always in big endian, so we add
an option to choose the endiannes of the parameter page.

Change-Id: I58c8ce2f6a2d4ac71c0b832a76e2ec5b943004e2
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
(cherry picked from commit 317d40eb01a8e194e6e321e71e811d6da03b8365)

show more ...

UPSTREAM: drivers: nand: brcmnand: add initial support

The driver brcmnand come from linux kernel 4.18.
Only SoC bcm6838 and bcm6858 are supported.

Change-Id: I0337600b164da018c1236ef9cbdd90ecc0904

UPSTREAM: drivers: nand: brcmnand: add initial support

The driver brcmnand come from linux kernel 4.18.
Only SoC bcm6838 and bcm6858 are supported.

Change-Id: I0337600b164da018c1236ef9cbdd90ecc0904ee7
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
(cherry picked from commit 22daafba25592b79112d21d1662d7b8381827c56)

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UPSTREAM: mtd: nand: provide several helpers to do common NAND operations

Linux commit 97d90da8a88 ("mtd: nand: provide several helpers
to do common NAND operations")

This is part of the process of

UPSTREAM: mtd: nand: provide several helpers to do common NAND operations

Linux commit 97d90da8a88 ("mtd: nand: provide several helpers
to do common NAND operations")

This is part of the process of removing direct calls to ->cmdfunc()
outside of the core in order to introduce a better interface to execute
NAND operations.

Here we provide several helpers and make use of them to remove all
direct calls to ->cmdfunc(). This way, we can easily modify those
helpers to make use of the new ->exec_op() interface when available.

Change-Id: I721c476a3ea5997dd4e4ca68ed929543478efd69
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
[miquel.raynal@free-electrons.com: rebased and fixed some conflicts]
Signed-off-by: Miquel Raynal <miquel.raynal@free-electrons.com>
Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com>
[Philippe Reynes: adapt code to u-boot and only keep new function]
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
(cherry picked from commit 9db29b300f7d9a58122a22a0815fe8449a664563)

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UPSTREAM: mtd: rawnand: denali: add reset handling

This adds reset handling to the devicetree-enabled Denali NAND driver.

For backwards compatibility, only a warning is printed when failing to
get

UPSTREAM: mtd: rawnand: denali: add reset handling

This adds reset handling to the devicetree-enabled Denali NAND driver.

For backwards compatibility, only a warning is printed when failing to
get reset handles.

Change-Id: I0d0ccb6e20f7c3ca6056c8aa03fb8ccd7b7bf340
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
(cherry picked from commit ed784ac3822b7d7019679a41a17907296e2dadbe)

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UPSTREAM: mtd: rawnand: stm32_fmc2: add STM32 FMC2 NAND flash controller driver

The driver adds the support for the STMicroelectronics FMC2 NAND
Controller found on STM32MP SOCs.

This patch adds th

UPSTREAM: mtd: rawnand: stm32_fmc2: add STM32 FMC2 NAND flash controller driver

The driver adds the support for the STMicroelectronics FMC2 NAND
Controller found on STM32MP SOCs.

This patch adds the polling mode, a basic mode that do not need
any DMA channels.

Only NAND_ECC_HW mode is actually supported.
The driver supports a maximum 8k page size.
The following ECC strength and step size are currently supported:
- nand-ecc-strength = <8>, nand-ecc-step-size = <512> (BCH8)
- nand-ecc-strength = <4>, nand-ecc-step-size = <512> (BCH4)
- nand-ecc-strength = <1>, nand-ecc-step-size = <512> (Extended ECC
based on Hamming)

This patch has been tested on Micron MT29F8G08ABACAH4.

Change-Id: I30c2a61a49af2f8855f7f98ef302a70554d87a5d
Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
(cherry picked from commit 7bb75023a720432a32840c6df543aae92653b23d)

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UPSTREAM: mtd: spinand: Sync GigaDevice GD5F1GQ4UExxG with latest Linux version

This patch sync's the U-Boot SPI NAND GigaDevice GD5F1GQ4UExxG support
with the latest Linux version (v5.0-rc3) plus t

UPSTREAM: mtd: spinand: Sync GigaDevice GD5F1GQ4UExxG with latest Linux version

This patch sync's the U-Boot SPI NAND GigaDevice GD5F1GQ4UExxG support
with the latest Linux version (v5.0-rc3) plus the chip supported posted
on the MTD list. Only the currently in U-Boot available chip is
supported with this sync.

The changes for the GD5F1GQ4UExxG are:
- Name of NAND device changed to better reflect the real part
- OOB layout changed to only reserve 1 byte for BBT
- Use ECC caps 8bits/512bytes instead of 8bits/2048bytes
- Enhanced ecc_get_status() function to determine and report
a more fine grained bit error status

Change-Id: Ia0f8ea6e9c19aec57628ea3217128c389c1375c1
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Boris Brezillon <bbrezillon@kernel.org>
Cc: Miquel Raynal <miquel.raynal@bootlin.com>
Acked-by: Jagan Teki <jagan@openedev.com>
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
(cherry picked from commit d67fb265d1c071c6475fd97d01787b4c961516d5)

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UPSTREAM: MTD: mxs_nand_spl: Redo the way nand_init initializes

Currently the spl system calls nand_init which does nothing.
It isn't until an attempt to load from NAND that it gets initialized.
Sub

UPSTREAM: MTD: mxs_nand_spl: Redo the way nand_init initializes

Currently the spl system calls nand_init which does nothing.
It isn't until an attempt to load from NAND that it gets initialized.
Subsequent attempts to load just skip the initialization because
NAND is already initialized.

This moves the contents of mxs_nand_init to nand_init. In the event
of an error, it clears the number of nand chips found. Any
attempts to use nand will check if there are nand chips available
instead of actually doing the initialization at that time. If there
are none, it will return an error to the higher level calls.

Change-Id: Icfde060758de88354580fc4834adb880bb205b39
Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
(cherry picked from commit d46d27d3b6558904b8fb44e90393f11c54ef3363)

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UPSTREAM: MTD: nand: mxs_nand: Allow driver to auto setup ECC in SPL

The initialization of the NAND in SPL hard-coded ecc.bytes,
ecc.size, and ecc.strength which may work for some NAND parts,
but it

UPSTREAM: MTD: nand: mxs_nand: Allow driver to auto setup ECC in SPL

The initialization of the NAND in SPL hard-coded ecc.bytes,
ecc.size, and ecc.strength which may work for some NAND parts,
but it not appropriate for others. With the pending patch
"mxs_nand: Fix BCH read timeout error on boards requiring ECC"
the driver can auto configure the ECC when these entries are
blank. This patch has been tested in NAND flash with oob 64
and oob 128.

Change-Id: Iaa9d322e8b39bbde309993e9bb9cb53cd920e80c
Signed-off-by: Adam Ford <aford173@gmail.com>
Tested-by: Jörg Krause <joerg.krause@embedded.rocks>
Acked-by: Tim Harvey <tharvey@gateworks.com>
Tested-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
(cherry picked from commit 04568bd0b6d673a325eed76bd857a9cbd0c556bc)

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UPSTREAM: MTD: NAND: mxs_nand_init_dma: Make mxs_nand_init_dma static

mxs_nand_init_dma is only referenced from mxs_nand.c. It's not
referenced in any headers or outside code, so this patch
defines

UPSTREAM: MTD: NAND: mxs_nand_init_dma: Make mxs_nand_init_dma static

mxs_nand_init_dma is only referenced from mxs_nand.c. It's not
referenced in any headers or outside code, so this patch
defines it as static.

Change-Id: I6c1dd1690288a073b95a715c53e4bc36b154dd59
Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
(cherry picked from commit 5645df9e00a01407730dc11d3a2bc4969203dc8c)

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UPSTREAM: MTD: mxs_nand: Fix BCH read timeout error on boards requiring ECC

The LogicPD board uses a Micron Flash with ECC. To boot this from
SPL, the ECC needs to be correctly configured or the BC

UPSTREAM: MTD: mxs_nand: Fix BCH read timeout error on boards requiring ECC

The LogicPD board uses a Micron Flash with ECC. To boot this from
SPL, the ECC needs to be correctly configured or the BCH engine
times out.

Change-Id: I0fcdc7f4853bf01c1a7318f4384767e9cb252e2c
Signed-off-by: Adam Ford <aford173@gmail.com>
Acked-by: Stefan Agner <stefan.agner@toradex.com>
Tested-by: Jörg Krause <joerg.krause@embedded.rocks>
Acked-by: Tim Harvey <tharvey@gateworks.com>
Tested-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
(cherry picked from commit 5ae585ba3a8bb2336d5cb6e1ef4c80a5ef445409)

show more ...

UPSTREAM: MTD: nand: mxs_nand_spl: Fix empty function pointer for BBT

The initialization function calls a nand_chip.scan_bbt(mtd) but
scan_bbt is never initialized resulting in an undefined function

UPSTREAM: MTD: nand: mxs_nand_spl: Fix empty function pointer for BBT

The initialization function calls a nand_chip.scan_bbt(mtd) but
scan_bbt is never initialized resulting in an undefined function
pointer. This will direct the function pointer to nand_default_bbt
defined in the same file.

Change-Id: Ie96ca5a965549ac74293f5f96cd6fbe4220b91fa
Signed-off-by: Adam Ford <aford173@gmail.com>
Acked-by: Stefan Agner <stefan.agner@toradex.com>
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
(cherry picked from commit 96d0be07e7498e7174daa6f3b56fc807b9feb71d)

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UPSTREAM: mtd: nand: arasan_nfc: Add support for nand multi chip select

This patch adds support for nand multi chip select.
Also adding CONFIG_SYS_NAND_MAX_CHIPS to Kconfig to specify maximum number

UPSTREAM: mtd: nand: arasan_nfc: Add support for nand multi chip select

This patch adds support for nand multi chip select.
Also adding CONFIG_SYS_NAND_MAX_CHIPS to Kconfig to specify maximum number
of nand chips.

Change-Id: I7f6a8c4f3069bfc6c5eae9196a814ee08b1bb6d4
Signed-off-by: Tummala Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
(cherry picked from commit 97fca6a146390e1c4a5fe4c29b68f7730229db56)

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UPSTREAM: ARM: at91: Convert SPL_GENERATE_ATMEL_PMECC_HEADER to Kconfig

This commit converts the following items to Kconfig:

CONFIG_ATMEL_NAND_HWECC
CONFIG_ATMEL_NAND_HW_PMECC
CONFIG_PMECC_CAP
CONF

UPSTREAM: ARM: at91: Convert SPL_GENERATE_ATMEL_PMECC_HEADER to Kconfig

This commit converts the following items to Kconfig:

CONFIG_ATMEL_NAND_HWECC
CONFIG_ATMEL_NAND_HW_PMECC
CONFIG_PMECC_CAP
CONFIG_PMECC_SECTOR_SIZE
CONFIG_SPL_GENERATE_ATMEL_PMECC_HEADER

[PMECC References]
https://www.at91.com/linux4sam/bin/view/Linux4SAM/PmeccConfigure
https://www.at91.com/linux4sam/bin/view/Linux4SAM/AT91Bootstrap

[Mailing List Thread]
https://lists.denx.de/pipermail/u-boot/2018-December/350666.html

Fixes: 5541543f ("configs: at91: Remove CONFIG_SYS_EXTRA_OPTIONS assignment")
[trini: Make the migration be size neutral and possibly not fix the
above in all cases]
Reported-by: Daniel Evans <photonthunder@gmail.com>
Cc: Eugen Hristev <eugen.hristev@microchip.com>
Signed-off-by: Derald D. Woods <woods.technical@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Change-Id: I00f123659dcb281b50cd4720901343e039e802c1
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
(cherry picked from commit a 49ad40298cc5639436c6d490b699ecb60895ba2d）

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UPSTREAM: mtd: nand: raw: allow to disable unneeded ECC layouts

Each ECC layout consumes about 2984 bytes in the .data section. Allow
to disable the default ECC layouts if a driver is known to provi

UPSTREAM: mtd: nand: raw: allow to disable unneeded ECC layouts

Each ECC layout consumes about 2984 bytes in the .data section. Allow
to disable the default ECC layouts if a driver is known to provide its
own ECC layout.

Change-Id: I6e51f184fd4dcc688d2c27c8ba5b789bf6743344
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
(cherry picked from commit a38c3af868ad2a7a7c04667e559570d5f81b1d51)

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UPSTREAM: mtd: nand: raw: Add Hynix H27UBG8T2BTR id table

This patch adds Hynix H27UBG8T2BTR id table as part of raw nand,
these chips were available in some A20-olinuxino-micro boards.

Change-Id:

UPSTREAM: mtd: nand: raw: Add Hynix H27UBG8T2BTR id table

This patch adds Hynix H27UBG8T2BTR id table as part of raw nand,
these chips were available in some A20-olinuxino-micro boards.

Change-Id: I51130e0c1579a98bc74c023fa725302b3833374f
Signed-off-by: Nikolai Zhubr <n-a-zhubr@yandex.ru>
[jagan: add proper commit message]
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
(cherry picked from commit cdf72c188c62b8ac20e5a2e1abbd45bc721e2ff9)

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UPSTREAM: nand: vybrid: Extend the vf610 NFC NAND driver to support device tree (and DM)

This commit adds support for device tree and enumeration via device model
for the Vybrid's NFC NAND driver.

UPSTREAM: nand: vybrid: Extend the vf610 NFC NAND driver to support device tree (and DM)

This commit adds support for device tree and enumeration via device model
for the Vybrid's NFC NAND driver.

Change-Id: I382299d2fb235ee2a922527a0933afbd89317a1c
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
(cherry picked from commit acdf10e17937f4b23fb2613e148caf25aac62c37)

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UPSTREAM: Kconfig: Add entry for VF610 NAND NFC device tree aware driver

This commit provides code to add proper entry to Kconfig to enable
support for VF610 device tree aware driver.

Change-Id: I1

UPSTREAM: Kconfig: Add entry for VF610 NAND NFC device tree aware driver

This commit provides code to add proper entry to Kconfig to enable
support for VF610 device tree aware driver.

Change-Id: I117a450614f987c83f3e29bfbc57fa35a6a30288
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
(cherry picked from commit 8a12d127d7a9298e051b6b26d4cc1e7c3af1d83a)

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UPSTREAM: nand: vybrid: Use calloc() instead of malloc() to allocate struct nfc

Without this change it is possible that Vybrid's NFC driver malloc() call
will obtain some memory used (and correctly

UPSTREAM: nand: vybrid: Use calloc() instead of malloc() to allocate struct nfc

Without this change it is possible that Vybrid's NFC driver malloc() call
will obtain some memory used (and correctly free'd) by some previous
driver (in this case pinctrl for Vybrid).

As a result some fields of struct nfc - in out case mtd->_get_device - are
"pre initialized" with some random values.

On the latter stage of booting, when e.g. somebody calls 'mtdparts default'
the "data abort" is observed when __get_mtd_device() function is called.

The mtd->_get_device pointer is not NULL and wrong value is referenced.

Change-Id: Ibf1b8d444f4cdd8103298ecb7bc594d8126ac555
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Stefan Agner <stefan.agner@toradex.com>
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
(cherry picked from commit 254409dbe836633b079968c0e7686ecd09b45dc7)

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UPSTREAM: mtd: rawnand: denali: fix a race condition when DMA is kicked

Based on Linux commit cf51e4b9c34407bf0c3d9b582b7837e047e1df47

Add the register read-back, commenting why this is necessary.

UPSTREAM: mtd: rawnand: denali: fix a race condition when DMA is kicked

Based on Linux commit cf51e4b9c34407bf0c3d9b582b7837e047e1df47

Add the register read-back, commenting why this is necessary.

Change-Id: I37833cf64255f4b3eb955b74c571889435d4f243
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
(cherry picked from commit 9d43649a7740cf715c750929d19661a35144e7d1)

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UPSTREAM: mtd: rawnand: denali: optimize timing parameters for data interface

Based on Linux commit 1dfac31a5a63ac04a9b5fbc3f5105a586560f191

This commit improves the ->setup_data_interface() hook.

UPSTREAM: mtd: rawnand: denali: optimize timing parameters for data interface

Based on Linux commit 1dfac31a5a63ac04a9b5fbc3f5105a586560f191

This commit improves the ->setup_data_interface() hook.

The denali_setup_data_interface() needs the frequency of clk_x
and the ratio of clk_x / clk.

The latter is currently hardcoded in the driver, like this:

#define DENALI_CLK_X_MULT 6

The IP datasheet requires that clk_x / clk be 4, 5, or 6. I just
chose 6 because it is the most defensive value, but it is not optimal.
By getting the clock rate of both "clk" and "clk_x", the driver can
compute the timing values more precisely.

To not break the existing platforms, the fallback value, 50 MHz is
provided. It is true for all upstreamed platforms.

Change-Id: Ia8b76dbbbac6ae1d82936a633c457280e3adc315
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
(cherry picked from commit 8ccfbfb3e1c54caf67def3626ca046fafaa5092d)

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UPSTREAM: mtd: rawnand: denali_dt: add more clocks based on IP datasheet

Based on Linux commit 6f1fe97bec349a1fd6c5a8c7c5998d759fe721d5

Currently, denali_dt.c requires a single anonymous clock, but

UPSTREAM: mtd: rawnand: denali_dt: add more clocks based on IP datasheet

Based on Linux commit 6f1fe97bec349a1fd6c5a8c7c5998d759fe721d5

Currently, denali_dt.c requires a single anonymous clock, but
the Denali User's Guide requires three clocks for this IP:

- clk: controller core clock

- clk_x: bus interface clock

- ecc_clk: clock at which ECC circuitry is run

This commit supports these named clocks to represent the real hardware.

For the backward compatibility, the driver still accepts a single clock
just as before. The clk_x_rate is taken from the clock driver again if
the named clock "clk_x" is available. This will happen only for future
DT, hence the existing DT files are not affected.

Change-Id: Ib1b3913554f5a3cad89f6ca919a3ca8e020bb1ad
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
(cherry picked from commit a13fe7afe9cd79060ecb8ac03265a27ceb7d91eb)

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UPSTREAM: mtd: nand: Arasan: Add subpage configuration support

Add support for disabling subpage write support via
CONFIG_SYS_NAND_NO_SUBPAGE_WRITE.

Currently the Linux Arasan driver does not suppo

UPSTREAM: mtd: nand: Arasan: Add subpage configuration support

Add support for disabling subpage write support via
CONFIG_SYS_NAND_NO_SUBPAGE_WRITE.

Currently the Linux Arasan driver does not support subpage writes and in
case of running UBI and accessing the same UBI volume from both U-Boot
and Linux it is required to have the same subpage write configuration
else the location of the UBI headers (EC + VID) will be misaligned
(subpage vs page) and incompatible. Hence the need for disabling
subpage write support in the U-Boot Arasan NAND driver.

Change-Id: Ifa8b66ae1a29efd8705da564ca83012fb8e1d7bd
Signed-off-by: Martin Lund <malu@gomspace.com>
Acked-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
(cherry picked from commit 1cefca71d237aae2c5cc2445f7698941443a2cd9)

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UPSTREAM: mtd: rawnand: pxa3xx: fix 2kiB pages with 8b strength chips layout

The initial layout for such NAND chips was the following:

+-------------------------------------------------------------

UPSTREAM: mtd: rawnand: pxa3xx: fix 2kiB pages with 8b strength chips layout

The initial layout for such NAND chips was the following:

+----------------------------------------------------------------------------+
| 1024 (data) | 30 (ECC) | 1024 (data) | 30 (ECC) | 32 (free OOB) | 30 (ECC) |
+----------------------------------------------------------------------------+

This layout has a weakness: reading empty pages trigger ECC errors
(this is expected), but the hardware ECC engine tries to correct the
data anyway and creates itself bitflips, hence bitflips are detected
in erased pages while actually there are none in the NAND chip.

Two solutions have been found at the same time. One was to enlarge the
free OOB area to 64 bytes, changing the layout to be:

+----------------------------------------------------------------------------+
| 1024 (data) | 30 (ECC) | 1024 (data) | 30 (ECC) | 64 (free OOB) | 30 (ECC) |
+----------------------------------------------------------------------------+
^^

The very big drawbacks of this solution are:
1/ It prevents booting from NAND.
2/ The current Linux driver (marvell_nand) does not have such problem
because it already re-reads possible empty pages in raw mode before
checking for bitflips. Using different layouts in U-Boot and Linux
would simply not work.

As this driver does support raw reads now and uses it to check for
empty pages, let's forget about this broken hack and return to the
initial layout with only 32 free OOB bytes.

Fixes: ac56a3b30c ("mtd: nand: pxa3xx: add support for 2KB 8-bit flash")
Change-Id: Ie0c901afa1ad8d525957e8ebb5211cf2a741901e
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Acked-by: Jagan Teki <jagan@openedev.com>
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
(cherry picked from commit c907464a0ad5f1327a3873e9d0ffd617a0182a44)

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UPSTREAM: mtd: nand: pxa3xx: re-read a page in raw mode on uncorrectable error

This only applies on BCH path.

When an empty page is read, it triggers an uncorrectable error. While
this is expected,

UPSTREAM: mtd: nand: pxa3xx: re-read a page in raw mode on uncorrectable error

This only applies on BCH path.

When an empty page is read, it triggers an uncorrectable error. While
this is expected, the ECC engine might produce itself bitflips in the
read data under certain layouts. To overcome this situation, always
re-read the entire page in raw mode and check for the whole page to be
empty.

Also report the right number of bitflips if there are any.

Change-Id: Ia83b841b91fc58c9c1640690a244965c92c8ce60
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Acked-by: Jagan Teki <jagan@openedev.com>
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
(cherry picked from commit af61ea27f51fce62188276d7b5682ac51b03a705)

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UPSTREAM: mtd: nand: pxa3xx: add raw read support

Raw read support is added by editing a few code sections:

->handle_data_pio() includes the ECC bytes that are not consumed
anymore by the E

UPSTREAM: mtd: nand: pxa3xx: add raw read support

Raw read support is added by editing a few code sections:

->handle_data_pio() includes the ECC bytes that are not consumed
anymore by the ECC engine.

->prepare_set_command() is changed so that the ECC bytes are
requested as part of the data I/O length.

->drain_fifo() shall also avoid checking the R/B pin too often
when in raw mode.

->read_page_raw()/->read_oob_raw() are written from scratch.

Change-Id: Ic086aa685a84325bd37c7db3f900343682776045
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Acked-by: Jagan Teki <jagan@openedev.com>
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
(cherry picked from commit 6293b0361d9816dc5286cd766d4865a30ebdfb6f)

show more ...