mtd: spinand: xtx: Support new device XT26G08DWSIGA

Change-Id: I0b3bb2fc5825e43c50c5c40bbc7d832cc4bcb509
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

mtd: spinand: xtx: Support new devices

XT26G12DWSIGA, XT26Q12DWSIGA, XT26G11DWSIGA, XT26Q14DWSIGA.

Change-Id: I78821b204f638ce9f75d32ae1bc1a9fa60664e62
Signed-off-by: Jon Lin <jon.lin@rock-chips.co

mtd: spinand: xtx: Support new devices

XT26G12DWSIGA, XT26Q12DWSIGA, XT26G11DWSIGA, XT26Q14DWSIGA.

Change-Id: I78821b204f638ce9f75d32ae1bc1a9fa60664e62
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

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mtd: spinand: xtx: Support new device XT26Q01DWSIGA

Change-Id: If1044efe918f854085c019adad803687e01449e9
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

mtd: spinand: xtx: Support new device XT26Q04DWSIGT-B

Change-Id: Ifa4eb38170c4c59bf038897b3535d9059031c82c
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

mtd: spinand: xtx: Support new device XT26G0xDWSIGA

XT26G01DWSIGA, XT26G02DWSIGA, XT26G04DWSIGA

Change-Id: I2f5078d63f39906dbcd9dec786329698c0e220c0
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

mtd: spinand: xtx: Support new devices

XT26Q02DWSIGA, XT26Q01DWSIGA, XT26Q04DWSIGA

Change-Id: I1c5ea065e83d4d3eab62d2b91c746135d506b8b2
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

mtd: spinand: Fix XT26G11C ecc status ops

Change-Id: Ie94a3687e70b9161823166f59422c3fa808cf5e8
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

mtd: spinand: Fix XTX devices id information

Change to SPINAND_READID_METHOD_OPCODE_ADDR

Change-Id: If321224306ef21951a10410cda7d8b9f36527517
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

mtd: spinand: rework detect procedure for different READ_ID operation

Currently there are 3 different variants of read_id implementation:
1. opcode only. Found in GD5FxGQ4xF.
2. opcode + 1 addr byte

mtd: spinand: rework detect procedure for different READ_ID operation

Currently there are 3 different variants of read_id implementation:
1. opcode only. Found in GD5FxGQ4xF.
2. opcode + 1 addr byte. Found in GD5GxGQ4xA/E
3. opcode + 1 dummy byte. Found in other currently supported chips.

Original implementation was for variant 1 and let detect function
of chips with variant 2 and 3 to ignore the first byte. This isn't
robust:

1. For chips of variant 2, if SPI master doesn't keep MOSI low
during read, chip will get a random id offset, and the entire id
buffer will shift by that offset, causing detect failure.

2. For chips of variant 1, if it happens to get a devid that equals
to manufacture id of variant 2 or 3 chips, it'll get incorrectly
detected.

This patch reworks detect procedure to address problems above. New
logic do detection for all variants separatedly, in 1-2-3 order.
Since all current detect methods do exactly the same id matching
procedure, unify them into core.c and remove detect method from
manufacture_ops.

Link: https://lore.kernel.org/linux-mtd/20200208074439.146296-1-gch981213@gmail.com

Change-Id: Ib06417c8e8c7e9d58be1eb3549468bfcbd74350d
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

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mtd: spinand: Support new device

XT26G11C

Change-Id: I83a0165e7df8b53dd8ba6dd9857938385dc4ded3
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

mtd: spinand: Support new device

XT26G02C

Change-Id: Ia3ccd73bd98206d1c96ea0a1f0264cad45f5c376
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

mtd: spinand: Support new devices

XT26G04C

Change-Id: I9004728fc1dfd03a54578fbf344171c4bdc3d69d
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

mtd: spinand: Support new devices

XT26G01C

Change-Id: If7147ebd12a993de86b335824d8c6e9d8ea06d52
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

mtd: spinand: Support xtx devices

Support XT26G01A, XT26G02A, XT26G04A, XT26G01B, XT26G02B

Change-Id: I447d83e5c5da8f6ba8515aab77a8039fe9cb2cc4
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>