| #
63157c44 |
| 21-Aug-2024 |
Jon Lin <jon.lin@rock-chips.com> |
mtd: spinand: UNIM: Support new device UM19A9LISW and UM19A9HISW
Change-Id: I48805bad26195e0bc5c918b245f7ace5b7a6320d Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
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| #
5f8f61db |
| 12-Jan-2024 |
Jon Lin <jon.lin@rock-chips.com> |
mtd: spinand: unim: The nand flash does not support 84H and 34H command
Change-Id: I717c8ca8e7447f64e34c648ce679ad79a87ca429 Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
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| #
24e784d8 |
| 21-Dec-2023 |
Jon Lin <jon.lin@rock-chips.com> |
mtd: spinand: unim: Support new devices
UM19A0HISW, UM19A0LISW, UM19A1HISW, UM19A1lISW
Change-Id: I76524e8a8c4325dfe97d1a57b24d611c263b6d8d Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
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| #
ed68cf16 |
| 27-Jun-2023 |
Jon Lin <jon.lin@rock-chips.com> |
mtd: spinand: Fix the error method for judging flash ECC
The former method makes ECC effective value decreased from 4 to 1.
Change-Id: Iaab3d587d4f0649b3affc8802c6a818843fbc730 Signed-off-by: Jon L
mtd: spinand: Fix the error method for judging flash ECC
The former method makes ECC effective value decreased from 4 to 1.
Change-Id: Iaab3d587d4f0649b3affc8802c6a818843fbc730 Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
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| #
81afcfe1 |
| 15-Oct-2021 |
Jon Lin <jon.lin@rock-chips.com> |
mtd: spinand: rework detect procedure for different READ_ID operation
Currently there are 3 different variants of read_id implementation: 1. opcode only. Found in GD5FxGQ4xF. 2. opcode + 1 addr byte
mtd: spinand: rework detect procedure for different READ_ID operation
Currently there are 3 different variants of read_id implementation: 1. opcode only. Found in GD5FxGQ4xF. 2. opcode + 1 addr byte. Found in GD5GxGQ4xA/E 3. opcode + 1 dummy byte. Found in other currently supported chips.
Original implementation was for variant 1 and let detect function of chips with variant 2 and 3 to ignore the first byte. This isn't robust:
1. For chips of variant 2, if SPI master doesn't keep MOSI low during read, chip will get a random id offset, and the entire id buffer will shift by that offset, causing detect failure.
2. For chips of variant 1, if it happens to get a devid that equals to manufacture id of variant 2 or 3 chips, it'll get incorrectly detected.
This patch reworks detect procedure to address problems above. New logic do detection for all variants separatedly, in 1-2-3 order. Since all current detect methods do exactly the same id matching procedure, unify them into core.c and remove detect method from manufacture_ops.
Link: https://lore.kernel.org/linux-mtd/20200208074439.146296-1-gch981213@gmail.com
Change-Id: Ib06417c8e8c7e9d58be1eb3549468bfcbd74350d Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
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| #
b00e662d |
| 22-Sep-2021 |
Jon Lin <jon.lin@rock-chips.com> |
mtd: spinand: Support new device
TX25G01
Change-Id: Ife04db759dc9b5db905b50b64ba947828342496d Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
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