mtd: spinand: dosilicon: Support new device DS35Q2GBS

Change-Id: I98d8144ecc93daf3100a23abe625ba5ee5882d10
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

mtd: spinand: dosilicon: Support new device

DS35M4GB-IB, DS35Q4GB-IB, DS35Q12C-IB, DS35M12C-IB

Change-Id: I0f4e69958779250de5d8045312748eec6cf3d4e0
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

mtd: spinand: dosilicon: Support new device DS35Q1GD-IB

Change-Id: I037cd2601c84bdf57be2f5822c585b5efc8f6c89
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

mtd: spinand: dosilicon: Modify redundant ECC status bits

Change-Id: Ie620e741de6d9da8c5bb4fe69f67ee182e7be2c3
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

mtd: spinand: Support new devices

DS35Q12B, DS35M12B

Change-Id: I180156bdd6a3a06cf155c1c3fdf21bd126fb3ffb
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

mtd: spinand: Support new devices

DS35Q1GB, DS35Q4GM

Change-Id: I509e0b85643c203c10c0d2dc173330399cdc927f
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

mtd: spinand: Support new devices

DS35M1GB, DS35M2GA

Change-Id: Iaf7f7f03bd1f500cd7dfe1738730ea797182a3a6
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

mtd: spinand: rework detect procedure for different READ_ID operation

Currently there are 3 different variants of read_id implementation:
1. opcode only. Found in GD5FxGQ4xF.
2. opcode + 1 addr byte

mtd: spinand: rework detect procedure for different READ_ID operation

Currently there are 3 different variants of read_id implementation:
1. opcode only. Found in GD5FxGQ4xF.
2. opcode + 1 addr byte. Found in GD5GxGQ4xA/E
3. opcode + 1 dummy byte. Found in other currently supported chips.

Original implementation was for variant 1 and let detect function
of chips with variant 2 and 3 to ignore the first byte. This isn't
robust:

1. For chips of variant 2, if SPI master doesn't keep MOSI low
during read, chip will get a random id offset, and the entire id
buffer will shift by that offset, causing detect failure.

2. For chips of variant 1, if it happens to get a devid that equals
to manufacture id of variant 2 or 3 chips, it'll get incorrectly
detected.

This patch reworks detect procedure to address problems above. New
logic do detection for all variants separatedly, in 1-2-3 order.
Since all current detect methods do exactly the same id matching
procedure, unify them into core.c and remove detect method from
manufacture_ops.

Link: https://lore.kernel.org/linux-mtd/20200208074439.146296-1-gch981213@gmail.com

Change-Id: Ib06417c8e8c7e9d58be1eb3549468bfcbd74350d
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

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mtd: spinand: Support DS35Q2GB

Support DS35Q2GB

Change-Id: I98133fcff9a7b6f9de401c8ca5fb8484cc1760d2
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

mtd: spinand: Support DS35X2GA

Change-Id: I05e3a0d28983cf24a8a7ba0aee23e434cda4a1a9
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

mtd: spinand: Support dosilicon devcies

Support DS35X1GA

Change-Id: Iadbda15075e54325bf5c2dffa28d560947cec627
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>