| #
ad0301ff |
| 11-Oct-2023 |
Jon Lin <jon.lin@rock-chips.com> |
mtd: nand: bbt: Add mechanisms to protect bad block tables
1.Add hash check 2.Add anti-shake mechanism to avoid damaging the bad block tables 3.Add anti-shake mechanism to optimize the reliability o
mtd: nand: bbt: Add mechanisms to protect bad block tables
1.Add hash check 2.Add anti-shake mechanism to avoid damaging the bad block tables 3.Add anti-shake mechanism to optimize the reliability of bad block table
Change-Id: I6ac9554ae0f642d6a89d21a8f79a2a87d607f993 Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
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| #
c98030d8 |
| 07-Sep-2023 |
Jon Lin <jon.lin@rock-chips.com> |
mtd: nand: Skip the first block during low format BBT
Nand Flash factory defined block0 fixed as good block. Do not scan block0 to avoid extreme boundary issues caused by scanning anomalies on that
mtd: nand: Skip the first block during low format BBT
Nand Flash factory defined block0 fixed as good block. Do not scan block0 to avoid extreme boundary issues caused by scanning anomalies on that block.
Change-Id: Ib830f90c497abbbee6d504bd20fa5cd66138a714 Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
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| #
78cac1df |
| 28-Jun-2020 |
Jon Lin <jon.lin@rock-chips.com> |
mtd: nand: Remove bbt option property if scan fail
Change-Id: Ifb5b500b6ffee551aea5b6aecea629b3d0ea6207 Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
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| #
2f0bb0e6 |
| 14-Jun-2020 |
Jon Lin <jon.lin@rock-chips.com> |
mtd: nand: Fix error in counting BITS_PER_LONG
Change-Id: I148a18733e055e5e43f7b259af05b3e0b36ac648 Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
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| #
be6c00c0 |
| 08-Jun-2020 |
Jon Lin <jon.lin@rock-chips.com> |
mtd: nand: Mark bbt start with spare offset 0 and ECC enabled
Change-Id: Ib388c6475003917da302f0535c18ac5fc51fb3e2 Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
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| #
fd817f1d |
| 17-May-2020 |
Jon Lin <jon.lin@rock-chips.com> |
mtd: nand: fix error in BBT bit operation
Change-Id: I51aab1342d8ded7ac6c19612d27abb8799b85850 Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
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| #
53bfae03 |
| 27-Apr-2020 |
Jon Lin <jon.lin@rock-chips.com> |
mtd: nand: add BBT using flash management strategy
Change-Id: Ib71dfbcf68283d1118742ab29079cab395ff99ca Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
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| #
e9e0746f |
| 27-Apr-2020 |
Joseph Chen <chenjh@rock-chips.com> |
Merge branch 'next-dev' into thunder-boot
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| #
bdf7b34b |
| 27-Apr-2020 |
Jon Lin <jon.lin@rock-chips.com> |
mtd: nand: Fix memory allocation in nanddev_bbt_init()
Fix the size of the buffer allocated to store the in-memory BBT. This bug was previously hidden by a different bug, that was fixed in commit e4
mtd: nand: Fix memory allocation in nanddev_bbt_init()
Fix the size of the buffer allocated to store the in-memory BBT. This bug was previously hidden by a different bug, that was fixed in commit e4fd10db8b8 ("mtd: nand: Fix nanddev_neraseblocks()").
Fixes: ed99f7731 ("mtd: nand: Add core infrastructure to deal with NAND devices") Change-Id: I365fdfe053ef352661a832b33a232cbb18e81be6 Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
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| #
ed99f773 |
| 16-Aug-2018 |
Boris Brezillon <boris.brezillon@bootlin.com> |
UPSTREAM: mtd: nand: Add core infrastructure to deal with NAND devices
Add an intermediate layer to abstract NAND device interface so that some logic can be shared between SPI NANDs, parallel/raw NA
UPSTREAM: mtd: nand: Add core infrastructure to deal with NAND devices
Add an intermediate layer to abstract NAND device interface so that some logic can be shared between SPI NANDs, parallel/raw NANDs, OneNANDs, ...
Change-Id: I0c2b2e3ddae912756a35aac2741dd1ce8a243b35 Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Acked-by: Jagan Teki <jagan@openedev.com> Signed-off-by: Jon Lin <jon.lin@rock-chips.com> (cherry picked from commit b95db8d33a1e920801816e47ffc5c6f18acce024)
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