mmc: fsl_esdhc: Add support for DDR mode

Add support of the DDR mode for eSDHC driver.
Enable it for i.MX6 SoC family only.

Signed-off-by: Volodymyr Riazantsev <volodymyr.riazantsev@globallogic.com

mmc: fsl_esdhc: Add support for DDR mode

Add support of the DDR mode for eSDHC driver.
Enable it for i.MX6 SoC family only.

Signed-off-by: Volodymyr Riazantsev <volodymyr.riazantsev@globallogic.com>
Reviewed-by: York Sun <yorksun@freescale.com>

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mmc: fsl_esdhc: Add support to force VSELECT set

Some boards cannot do voltage negotiation but need to set the VSELECT
bit forcely to ensure it to work at 1.8V.

This commit adds CONFIG_SYS_FSL_ESDH

mmc: fsl_esdhc: Add support to force VSELECT set

Some boards cannot do voltage negotiation but need to set the VSELECT
bit forcely to ensure it to work at 1.8V.

This commit adds CONFIG_SYS_FSL_ESDHC_FORCE_VSELECT flag for this use.

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>

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mmc: fsl_esdhc: Add CMD11 support to switch to 1.8V

This adds support to switch to 1.8V in case CMD11 succeeds.

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Reviewed-by: Marek Vasut <ma

mmc: fsl_esdhc: Add CMD11 support to switch to 1.8V

This adds support to switch to 1.8V in case CMD11 succeeds.

Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Reviewed-by: Marek Vasut <marex@denx.de>

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Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx

Conflicts:
drivers/mmc/fsl_esdhc.c

Signed-off-by: Tom Rini <trini@ti.com>

Merge branch 'master' of git://www.denx.de/git/u-boot-imx

linux/kernel.h: sync min, max, min3, max3 macros with Linux

U-Boot has never cared about the type when we get max/min of two
values, but Linux Kernel does. This commit gets min, max, min3, max3
mac

linux/kernel.h: sync min, max, min3, max3 macros with Linux

U-Boot has never cared about the type when we get max/min of two
values, but Linux Kernel does. This commit gets min, max, min3, max3
macros synced with the kernel introducing type checks.

Many of references of those macros must be fixed to suppress warnings.
We have two options:
- Use min, max, min3, max3 only when the arguments have the same type
(or add casts to the arguments)
- Use min_t/max_t instead with the appropriate type for the first
argument

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Pavel Machek <pavel@denx.de>
Acked-by: Lukasz Majewski <l.majewski@samsung.com>
Tested-by: Lukasz Majewski <l.majewski@samsung.com>
[trini: Fixup arch/blackfin/lib/string.c]
Signed-off-by: Tom Rini <trini@ti.com>

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mmc: fsl_esdhc: Update esdhc driver for iMX6SX

The reset value of "uSDHCx_INT_STATUS_EN" register is changed to 0
on iMX6SX. So the fsl_esdhc driver must update to set the register,
otherwise no sta

mmc: fsl_esdhc: Update esdhc driver for iMX6SX

The reset value of "uSDHCx_INT_STATUS_EN" register is changed to 0
on iMX6SX. So the fsl_esdhc driver must update to set the register,
otherwise no state can be detected.

Signed-off-by: Ye.Li <B37916@freescale.com>

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mmc: fsl_esdhc: fix f_max retrieval during init

for multi instance API we use struct fsl_esdhc_cfg to
pass the clock rate. Do not set f_max from global data,
since this is wrong for multi instance c

mmc: fsl_esdhc: fix f_max retrieval during init

for multi instance API we use struct fsl_esdhc_cfg to
pass the clock rate. Do not set f_max from global data,
since this is wrong for multi instance case.

Signed-off-by: Markus Niebel <Markus.Niebel@tq-group.com>
Acked-by: Stefano Babic <sbabic@denx.de>
Tested-by: Eric Nelson <eric.nelson@boundarydevices.com>
Reviewed-by: York Sun <yorksun@freescale.com>

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Merge branch 'uboot'

cosmetic: replace MIN, MAX with min, max

The macro MIN, MAX is defined as the aliase of min, max,
respectively.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>

Merge branch 'master' of git://git.denx.de/u-boot-arm

Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriq

ls102xa: esdhc: Add esdhc support for LS102xA

For LS1, esdhc is big-endian IP. Accessing the registers
should be in big-endian mode. So we use esdhc_read32()
to read Host controller capabilities reg

ls102xa: esdhc: Add esdhc support for LS102xA

For LS1, esdhc is big-endian IP. Accessing the registers
should be in big-endian mode. So we use esdhc_read32()
to read Host controller capabilities register for LS1.

For LS1, when using CMD12, cmdtype need to be set to
ABORT, otherwise, next read command will hang.

Signed-off-by: Alison Wang <alison.wang@freescale.com>

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esdhc/usdhc: Fix warning when CONFIG_SYS_FSL_ESDHC_USE_PIO is not set

In 7168977 we made calls to check_and_invalidate_dcache_range()
conditional on !CONFIG_SYS_FSL_ESDHC_USE_PIO. Only define this

esdhc/usdhc: Fix warning when CONFIG_SYS_FSL_ESDHC_USE_PIO is not set

In 7168977 we made calls to check_and_invalidate_dcache_range()
conditional on !CONFIG_SYS_FSL_ESDHC_USE_PIO. Only define this function
in this case as well.

Signed-off-by: Tom Rini <trini@ti.com>

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Merge branch 'master' of git://git.denx.de/u-boot-mmc

esdhc/usdhc: Fix PIO mode bug in fsl_esdhc driver

When configure the fsl_esdhc driver to PIO mode by defining
"CONFIG_SYS_FSL_ESDHC_USE_PIO", the SD/MMC read and write will fail.

Two bugs in the dr

esdhc/usdhc: Fix PIO mode bug in fsl_esdhc driver

When configure the fsl_esdhc driver to PIO mode by defining
"CONFIG_SYS_FSL_ESDHC_USE_PIO", the SD/MMC read and write will fail.

Two bugs in the driver to cause the issue:
1. The read buffer was invalidated after reading from DATAPORT register,
which should be only applied to DMA mode. The valid data in cache was
overwritten by physical memory.
2. The watermarks are not set in PIO mode, will cause according state not
be set.

Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
Signed-off-by: Ye.Li <B37916@freescale.com>

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Merge remote-tracking branch 'u-boot/master'

Conflicts:
boards.cfg

Conflicts were trivial once u-boot-arm/master boards.cfg was
reformatted (commit 6130c146) to match u-boot/master's own
reformatt

Merge remote-tracking branch 'u-boot/master'

Conflicts:
boards.cfg

Conflicts were trivial once u-boot-arm/master boards.cfg was
reformatted (commit 6130c146) to match u-boot/master's own
reformatting (commit 1b37fa83).

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Merge remote-tracking branch 'u-boot/master' into test

Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx

powerpc/85xx: Add T4240RDB board support

T4240RDB board Specification
----------------------------
Memory subsystem:
6GB DDR3
128MB NOR flash
2GB NAND flash

Ethernet:
Eight 1G SGMII por

powerpc/85xx: Add T4240RDB board support

T4240RDB board Specification
----------------------------
Memory subsystem:
6GB DDR3
128MB NOR flash
2GB NAND flash

Ethernet:
Eight 1G SGMII ports
Four 10Gbps SFP+ ports

PCIe:
Two PCIe slots

USB:
Two USB2.0 Type A ports

SDHC:
One SD-card port

SATA:
One SATA port

UART:
Dual RJ45 ports

Signed-off-by: Chunhe Lan <Chunhe.Lan@freescale.com>
[York Sun: fix CONFIG_SYS_QE_FMAN_FW_ADDR in T4240RDB.h]

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Merge branch 'u-boot/master' into 'u-boot-arm/master'

Conflicts:
arch/arm/cpu/arm926ejs/mxs/Makefile
include/configs/trats.h
include/configs/trats2.h
include/mmc.h

mmc:eSDHC: Workaround for data timeout issue on Txxx SoC

1. The Data timeout counter value in eSDHC_SYSCTL register is
not working as it should be, so add quirks to enable this
workaround to fix it

mmc:eSDHC: Workaround for data timeout issue on Txxx SoC

1. The Data timeout counter value in eSDHC_SYSCTL register is
not working as it should be, so add quirks to enable this
workaround to fix it to the max value 0xE.

2. Add CONFIG_SYS_FSL_ERRATUM_ESDHC111 to enable its workaround.

* Update of patch for change mmc interface by
Pantelis Antoniou <panto@antoniou-consulting.com>

Signed-off-by: Haijun Zhang <Haijun.Zhang@freescale.com>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>

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mmc: fsl_esdhc: add controller reset in case of data related errors too

The controller reset is performed now if command error occurs.
This commit adds the reset for the case of data related errors

mmc: fsl_esdhc: add controller reset in case of data related errors too

The controller reset is performed now if command error occurs.
This commit adds the reset for the case of data related errors too.

Signed-off-by: Andrew Gabbasov <andrew_gabbasov@mentor.com>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>

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mmc: fsl_esdhc: fix calculation of timeout for data transactions

Calculation of the timeout value should be based on actual clock value,
written to controller registers. Since mmc->tran_speed is eit

mmc: fsl_esdhc: fix calculation of timeout for data transactions

Calculation of the timeout value should be based on actual clock value,
written to controller registers. Since mmc->tran_speed is either the
maximum allowed speed, or the preliminary value, that is be not yet
set to registers, the actual timeout, taken by the controller, based
on its clock settings, may be much longer than expected, based on
mmc->tran_speed value. In particular it happens at early initialization
stage, when typical value of mmc->tran_speed is 20MHz or 26MHz, while
actual clock setting, configured in the controller, is 400kHz.
It's more correct to use mmc->clock value for timeout calculation instead.

Signed-off-by: Andrew Gabbasov <andrew_gabbasov@mentor.com>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>

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Merge branch 'master' of git://git.denx.de/u-boot-mmc