| #
5d97dff0 |
| 21-Sep-2016 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
treewide: replace #include <asm-generic/errno.h> with <linux/errno.h>
Now, include/linux/errno.h is a wrapper of <asm-generic/errno.h>.
Replace all include directives for <asm-generic/errno.h> with
treewide: replace #include <asm-generic/errno.h> with <linux/errno.h>
Now, include/linux/errno.h is a wrapper of <asm-generic/errno.h>.
Replace all include directives for <asm-generic/errno.h> with
<linux/errno.h>.
<asm-generic/...> is supposed to be included from <asm/...> when
arch-headers fall back into generic implementation. Generally, they
should not be directly included from .c files.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
[trini: Add drivers/usb/host/xhci-rockchip.c]
Signed-off-by: Tom Rini <trini@konsulko.com>
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| #
5f5620ab |
| 12-Nov-2015 |
Stefano Babic <sbabic@denx.de> |
Merge git://git.denx.de/u-boot
|
| #
588eec2a |
| 30-Oct-2015 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriq
|
| #
f59e69cb |
| 29-Oct-2015 |
Aneesh Bansal <aneesh.bansal@freescale.com> |
crypto/fsl: SEC driver cleanup for 64 bit and endianness
The SEC driver code has been cleaned up to work for 64 bit
physical addresses and systems where endianess of SEC block
is different from the
crypto/fsl: SEC driver cleanup for 64 bit and endianness
The SEC driver code has been cleaned up to work for 64 bit
physical addresses and systems where endianess of SEC block
is different from the Core.
Changes:
1. Descriptor created on Core is modified as per SEC block
endianness before the job is submitted.
2. The read/write of physical addresses to Job Rings will
be depend on endianness of SEC block as 32 bit low and
high part of the 64 bit address will vary.
3. The 32 bit low and high part of the 64 bit address in
descriptor will vary depending on endianness of SEC.
Signed-off-by: Aneesh Bansal <aneesh.bansal@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
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| #
b9cb6482 |
| 02-Mar-2015 |
Stefano Babic <sbabic@denx.de> |
Merge branch 'master' of git://git.denx.de/u-boot
|
| #
1606b34a |
| 25-Feb-2015 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriq
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| #
94e3c8c4 |
| 20-Feb-2015 |
gaurav rana <gaurav.rana@freescale.com> |
crypto/fsl - Add progressive hashing support using hardware acceleration.
Currently only normal hashing is supported using hardware acceleration.
Added support for progressive hashing using hardware
crypto/fsl - Add progressive hashing support using hardware acceleration.
Currently only normal hashing is supported using hardware acceleration.
Added support for progressive hashing using hardware.
Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com>
Signed-off-by: Gaurav Rana <gaurav.rana@freescale.com>
CC: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: York Sun <yorksun@freescale.com>
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| #
a84c8107 |
| 20-Oct-2014 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriq
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| #
b9eebfad |
| 15-Oct-2014 |
Ruchika Gupta <ruchika.gupta@freescale.com> |
fsl_sec: Add hardware accelerated SHA256 and SHA1
SHA-256 and SHA-1 accelerated using SEC hardware in Freescale SoC's
The driver for SEC (CAAM) IP is based on linux drivers/crypto/caam.
The platform
fsl_sec: Add hardware accelerated SHA256 and SHA1
SHA-256 and SHA-1 accelerated using SEC hardware in Freescale SoC's
The driver for SEC (CAAM) IP is based on linux drivers/crypto/caam.
The platforms needto add the MACRO CONFIG_FSL_CAAM inorder to
enable initialization of this hardware IP.
Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
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