History log of /rk3399_rockchip-uboot/drivers/crypto/fsl/desc_constr.h (Results 1 – 9 of 9)
Revision Date Author Comments
# 0badc648 29-Mar-2016 Tom Rini <trini@konsulko.com>

Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriq


# 69b6a796 23-Mar-2016 Saksham Jain <saksham.jain@nxp.com>

crypto/fsl: Correct 64-bit write when MMU disabled

When MMU is disabled, 64-bit write must be aligned at 64-bit
boundary. Becaue the memory location is not guaranteed to be 64-bit
aligned, the 64-bi

crypto/fsl: Correct 64-bit write when MMU disabled

When MMU is disabled, 64-bit write must be aligned at 64-bit
boundary. Becaue the memory location is not guaranteed to be 64-bit
aligned, the 64-bit write needs to be split into two 32-bit writes
to avoid the alignment exception.

Signed-off-by: Aneesh Bansal <aneesh.bansal@nxp.com>
Signed-off-by: Saksham Jain <saksham.jain@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>

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# 55926ddd 22-Mar-2016 Tom Rini <trini@konsulko.com>

Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriq


# 29590370 15-Feb-2016 Aneesh Bansal <aneesh.bansal@nxp.com>

drivers/crypto/fsl: add constructs for protocol descriptors

Construct APIs are added to create Protocol Descriptors for
CAAM block.

Signed-off-by: Ruchika Gupta <ruchika.gupta@nxp.com>
Signed-off-b

drivers/crypto/fsl: add constructs for protocol descriptors

Construct APIs are added to create Protocol Descriptors for
CAAM block.

Signed-off-by: Ruchika Gupta <ruchika.gupta@nxp.com>
Signed-off-by: Aneesh Bansal <aneesh.bansal@nxp.com>
CC: Ulises Cardenas <raul.casas@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>

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# 5f5620ab 12-Nov-2015 Stefano Babic <sbabic@denx.de>

Merge git://git.denx.de/u-boot


# 588eec2a 30-Oct-2015 Tom Rini <trini@konsulko.com>

Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriq


# f59e69cb 29-Oct-2015 Aneesh Bansal <aneesh.bansal@freescale.com>

crypto/fsl: SEC driver cleanup for 64 bit and endianness

The SEC driver code has been cleaned up to work for 64 bit
physical addresses and systems where endianess of SEC block
is different from the

crypto/fsl: SEC driver cleanup for 64 bit and endianness

The SEC driver code has been cleaned up to work for 64 bit
physical addresses and systems where endianess of SEC block
is different from the Core.
Changes:
1. Descriptor created on Core is modified as per SEC block
endianness before the job is submitted.
2. The read/write of physical addresses to Job Rings will
be depend on endianness of SEC block as 32 bit low and
high part of the 64 bit address will vary.
3. The 32 bit low and high part of the 64 bit address in
descriptor will vary depending on endianness of SEC.

Signed-off-by: Aneesh Bansal <aneesh.bansal@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>

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# a84c8107 20-Oct-2014 Tom Rini <trini@ti.com>

Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriq


# b9eebfad 15-Oct-2014 Ruchika Gupta <ruchika.gupta@freescale.com>

fsl_sec: Add hardware accelerated SHA256 and SHA1

SHA-256 and SHA-1 accelerated using SEC hardware in Freescale SoC's
The driver for SEC (CAAM) IP is based on linux drivers/crypto/caam.
The platform

fsl_sec: Add hardware accelerated SHA256 and SHA1

SHA-256 and SHA-1 accelerated using SEC hardware in Freescale SoC's
The driver for SEC (CAAM) IP is based on linux drivers/crypto/caam.
The platforms needto add the MACRO CONFIG_FSL_CAAM inorder to
enable initialization of this hardware IP.

Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>

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