| #
17629ef7 |
| 16-May-2025 |
Ziyuan Xu <xzy.xu@rock-chips.com> |
spl: atf: Add AARCH32 support when bl33 is linux
Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com> Change-Id: I84a27fd98c6e9bf7e51e9596308a3de9c5b986c2
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| #
2e71311c |
| 08-Jan-2025 |
Xuhui Lin <xuhui.lin@rock-chips.com> |
common: spl: Deliver aarch32 params based on uboot.itb
Change-Id: I0713c2cb11c43e33311e91f895c3bb465f5782a0 Signed-off-by: Xuhui Lin <xuhui.lin@rock-chips.com>
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| #
2687dce2 |
| 18-Oct-2024 |
Joseph Chen <chenjh@rock-chips.com> |
spl: atf: Fix invalid bl32 pc when bl32 is absent
'bl2_to_bl31_params->bl32_ep_info' is Null and '&bl2_to_bl31_params->bl32_ep_info->pc' is 0x8 when bl32 is absent. That means the pc value is determ
spl: atf: Fix invalid bl32 pc when bl32 is absent
'bl2_to_bl31_params->bl32_ep_info' is Null and '&bl2_to_bl31_params->bl32_ep_info->pc' is 0x8 when bl32 is absent. That means the pc value is determined by u-boot-spl.bin. The 0x8 offset of u-boot-spl.bin is the value of '_TEXT_BASE', i.e. CONFIG_SPL_TEXT_BASE.
So far, only rk3576 without bl32 would trigger this issue as DRAM base is 0x40000000.
Let's init bl32_{ep,image}_info even bl32 is absent.
Signed-off-by: Joseph Chen <chenjh@rock-chips.com> Change-Id: Ic928301baee1c7941f0befd7a89aa74dcbd88cb2
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| #
5d74586a |
| 03-Nov-2022 |
Joseph Chen <chenjh@rock-chips.com> |
spl: atf: Add AArch32 BL33 SPSR support
SPL is responsible to setup the ep params if BL33 is expected to run as AArch32 mode.
Signed-off-by: Joseph Chen <chenjh@rock-chips.com> Change-Id: I41ac1eb3
spl: atf: Add AArch32 BL33 SPSR support
SPL is responsible to setup the ep params if BL33 is expected to run as AArch32 mode.
Signed-off-by: Joseph Chen <chenjh@rock-chips.com> Change-Id: I41ac1eb35c40b1568b3fddae0c9097ee8c098d27
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| #
3bf65388 |
| 08-Mar-2022 |
Jason Zhu <jason.zhu@rock-chips.com> |
spl: atf: pass fdt info to atf through spl_image->fdt_addr
Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com> Change-Id: I9a980a4bda95f1b0e3b5171c52b33adcfdf5bb65
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| #
69a04b4f |
| 25-Nov-2020 |
Joseph Chen <chenjh@rock-chips.com> |
spl: atf: traverse all "/fit-images" sub nodes
Fix find sub nodes failed.
Signed-off-by: Joseph Chen <chenjh@rock-chips.com> Change-Id: I2cb885028da9711a15f001fdd48e9d273cfd348a
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| #
f8f8bbc6 |
| 10-Apr-2020 |
Joseph Chen <chenjh@rock-chips.com> |
Merge branch 'next-dev' into thunder-boot
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| #
f8ca9d16 |
| 02-Apr-2020 |
Joseph Chen <chenjh@rock-chips.com> |
spl: do cleanup before jumping to next stage
Cache/mmu/interrupt cleanup is recommand before jumping to next stage to avoid some uncertain things.
Provide a arch/board-specific callback to do clean
spl: do cleanup before jumping to next stage
Cache/mmu/interrupt cleanup is recommand before jumping to next stage to avoid some uncertain things.
Provide a arch/board-specific callback to do cleanup things.
Signed-off-by: Joseph Chen <chenjh@rock-chips.com> Change-Id: Ic5e4e378ec9080e7af283741370bcd9c2dc897dc
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| #
189f3a8c |
| 17-Feb-2020 |
Jason Zhu <jason.zhu@rock-chips.com> |
spl: atf: pass kernel parameters through bl33_ep_info->args
Pass when enable CONFIG_SPL_KERNEL_BOOT.
Change-Id: Iee442466df59eeaa0f477f264f523b026e516168 Signed-off-by: Jason Zhu <jason.zhu@rock-ch
spl: atf: pass kernel parameters through bl33_ep_info->args
Pass when enable CONFIG_SPL_KERNEL_BOOT.
Change-Id: Iee442466df59eeaa0f477f264f523b026e516168 Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
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| #
5a0e8341 |
| 06-Nov-2019 |
Jason Zhu <jason.zhu@rock-chips.com> |
spl: atf: pass kernel parameters through bl33_ep_info->args
Pass when enable CONFIG_SPL_KERNEL_BOOT.
Change-Id: Ia3d14bdc9dafe894a46d54a50123a2ad5a73f742 Signed-off-by: Jason Zhu <jason.zhu@rock-ch
spl: atf: pass kernel parameters through bl33_ep_info->args
Pass when enable CONFIG_SPL_KERNEL_BOOT.
Change-Id: Ia3d14bdc9dafe894a46d54a50123a2ad5a73f742 Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
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| #
df5ff5a3 |
| 19-Jun-2019 |
Joseph Chen <chenjh@rock-chips.com> |
common: spl: atf: disable and clean-invalidate icache/dcache
Refer to cleanup_before_linux().
Change-Id: Ia738f2816ab8c6fa09776aebd83f775697117d8c Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
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| #
1620aad4 |
| 12-Jun-2019 |
Joseph Chen <chenjh@rock-chips.com> |
common: spl: atf: add bl32/bl33 entry point to struct spl_image_info
This allows other booting device to initial other firmware entry point, but not only FIT.
Change-Id: I73b08d594079ce0842b68f1c9d
common: spl: atf: add bl32/bl33 entry point to struct spl_image_info
This allows other booting device to initial other firmware entry point, but not only FIT.
Change-Id: I73b08d594079ce0842b68f1c9d222f58e171b555 Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
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| #
64d1b263 |
| 11-Jun-2019 |
Joseph Chen <chenjh@rock-chips.com> |
common: spl: atf: export bl31_entry()
Change-Id: I7c628ba567ca554caa5902e6aa6592282ccf167d Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
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| #
b04f87d7 |
| 17-Apr-2019 |
Joseph Chen <chenjh@rock-chips.com> |
common: spl: support booting bl32
Change-Id: I525f2b3c9ce24464a775291ab8924adbc0da85f0 Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
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| #
4bba5ee7 |
| 02-Jan-2018 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
spl: atf: add SPL_ATF_NO_PLATFORM_PARAM option
While we expect to call a pointer to a valid FDT (or NULL) as the platform parameter to an ATF, some ATF versions are not U-Boot aware and have an insu
spl: atf: add SPL_ATF_NO_PLATFORM_PARAM option
While we expect to call a pointer to a valid FDT (or NULL) as the platform parameter to an ATF, some ATF versions are not U-Boot aware and have an insufficiently robust (or an overzealour) parameter validation: either way, this may cause a hard-stop with uncooperative ATF versions.
This change adds the option to suppress passing a platform parameter and will always pass NULL.
Debug output from ATF w/ this option disabled (i.e. default): INFO: plat_param_from_bl2: 0x291450 Debug output from ATF w/ this option enabled: INFO: plat_param_from_bl2: 0
Change-Id: Ic13bf77aa509407563d10ad3ce790087f2d1dc07 Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Tested-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> (cherry picked from commit d21fb63d772d32373600abeb7afcb53033e087a7)
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| #
2e15a11c |
| 13-Sep-2017 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
spl: atf: introduce spl_invoke_atf and make bl31_entry private
This adds a new interface spl_invoke_atf() that takes a spl_image_info argument and then derives the necessary parameters for the ATF e
spl: atf: introduce spl_invoke_atf and make bl31_entry private
This adds a new interface spl_invoke_atf() that takes a spl_image_info argument and then derives the necessary parameters for the ATF entry. Based on the additional information recorded (into /fit-images) from the FIT loadables, we can now easily locate the next boot stage.
We now pass a pointer to a FDT as the platform-specific parameter pointer to ATF (so we don't run into the future headache of every board/platform defining their own proprietary tag-structure), as FDT access is already available in ATF.
With the necessary infrastructure in place, we can now update the support for the ARM Trusted Firmware to dispatch into the spl_invoke_atf function only if a IH_OS_ARM_TRUSTED_FIRMWARE image is loaded.
Change-Id: Ia00abe207a0a0fed044fcda2b6e1054225b42901 Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> (cherry picked from commit 1d3790905d9c089b434c376f2dcc585b6a92bc99)
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| #
93a905c1 |
| 20-Dec-2017 |
Kever Yang <kever.yang@rock-chips.com> |
spl: atf: pass NULL for bl32_ep pc
Change-Id: Ibfd0054936fffed3603103226e304e4878598c84 Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
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| #
7940094c |
| 07-Sep-2017 |
Kever Yang <kever.yang@rock-chips.com> |
spl: update bl31_entry() with new name and parameter
Rename the bl31_entry() function with 'spl_' prefix and add one parameter for bl31 entry address since we can get it from spl_image header.
Chan
spl: update bl31_entry() with new name and parameter
Rename the bl31_entry() function with 'spl_' prefix and add one parameter for bl31 entry address since we can get it from spl_image header.
Change-Id: I4b6125f1d7138f26c2256ab86f449be4a6f1c4cc Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
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| #
bcc1726a |
| 05-May-2017 |
Kever Yang <kever.yang@rock-chips.com> |
spl: add support to booting with ATF
ATF(ARM Trusted Firmware) is used by ARM arch64 SoCs, find more infomation about ATF at: https://github.com/ARM-software/arm-trusted-firmware
SPL is considered
spl: add support to booting with ATF
ATF(ARM Trusted Firmware) is used by ARM arch64 SoCs, find more infomation about ATF at: https://github.com/ARM-software/arm-trusted-firmware
SPL is considered as BL2 in ATF terminology, it needs to load other parts of ATF binary like BL31, BL32, SCP-BL30, and BL33(U-Boot). And needs to prepare the parameter for BL31 which including entry and image information for all other images. Then the SPL handle PC to BL31 with the parameter, the BL31 will do the rest of work and at last get into U-Boot(BL33).
This patch needs work with patches from Andre for SPL support multi binary in FIT.
The entry point of bl31 and bl33 are still using hard code because we still can not get them from the FIT image information.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
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