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b064c912 |
| 11-Aug-2016 |
Bibek Basu <bbasu@nvidia.com> |
ARM: tegra: set vdd_core for Jetson TK1
Program vdd_core for Jetson TK1 to 1V, which is the max safe voltage for ultra low temperature operations. vdd_cpu and vdd_gpu are already at 1V.
Signed-off-
ARM: tegra: set vdd_core for Jetson TK1
Program vdd_core for Jetson TK1 to 1V, which is the max safe voltage for ultra low temperature operations. vdd_cpu and vdd_gpu are already at 1V.
Signed-off-by: Bibek Basu <bbasu@nvidia.com> (swarren: fixed comments to better match the code) (swarren: moved board ifdef around data in header, made code generic) (swarren: fixed typos in commit description) Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
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| #
f7dc4ac3 |
| 24-Jan-2014 |
Tom Warren <twarren.nvidia@gmail.com> |
ARM: tegra: add Venice2 (Tegra124) board
These are the board files for Venice2 (Tegra124), plus the AS3722 PMIC files. PMIC init will be moved to pmic_common_init later.
This builds/boots on Venice
ARM: tegra: add Venice2 (Tegra124) board
These are the board files for Venice2 (Tegra124), plus the AS3722 PMIC files. PMIC init will be moved to pmic_common_init later.
This builds/boots on Venice2, SPI/MMC/USB/I2C all work. Audio, display and WB/LP0 are not supported yet.
Signed-off-by: Tom Warren <twarren@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> Tested-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
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