| #
07d77838 |
| 01-Aug-2017 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-x86
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| #
5d89b37f |
| 30-Jul-2017 |
Bin Meng <bmeng.cn@gmail.com> |
x86: kconfig: Select ARCH_EARLY_INIT_R in the platform Kconfig
This is architecture-dependent early initialization hence should be put in the platform Kconfig.
Signed-off-by: Bin Meng <bmeng.cn@gma
x86: kconfig: Select ARCH_EARLY_INIT_R in the platform Kconfig
This is architecture-dependent early initialization hence should be put in the platform Kconfig.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
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| #
30b1ecd2 |
| 30-Jul-2017 |
Bin Meng <bmeng.cn@gmail.com> |
x86: kconfig: Let board select BOARD_EARLY_INIT_F
CONFIG_BOARD_EARLY_INIT_F literally indicates board-specific codes and should be not 'default y' for all x86 boards.
Signed-off-by: Bin Meng <bmeng
x86: kconfig: Let board select BOARD_EARLY_INIT_F
CONFIG_BOARD_EARLY_INIT_F literally indicates board-specific codes and should be not 'default y' for all x86 boards.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
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| #
779653b0 |
| 12-Mar-2016 |
Simon Glass <sjg@chromium.org> |
x86: Drop all the old pin configuration code
We don't need this anymore - we can use device tree and the new pinconfig driver instead.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin
x86: Drop all the old pin configuration code
We don't need this anymore - we can use device tree and the new pinconfig driver instead.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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| #
9ed781a6 |
| 17-Jan-2016 |
Simon Glass <sjg@chromium.org> |
x86: ivybridge: Move northbridge and PCH init into drivers
Instead of calling the northbridge and PCH init from bd82x6x_init_extra() when the PCI bus is probed, call it from the respective drivers.
x86: ivybridge: Move northbridge and PCH init into drivers
Instead of calling the northbridge and PCH init from bd82x6x_init_extra() when the PCI bus is probed, call it from the respective drivers. Also drop the Northbridge init as it has no effect. The registers it touches appear to be read-only.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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| #
b939689c |
| 05-May-2015 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot/master' into 'u-boot-arm/master'
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| #
a5dec5a5 |
| 26-Mar-2015 |
Simon Glass <sjg@chromium.org> |
x86: cros_ec: Drop unnecessary init
Since driver model will probe the EC when it is first used, we do not need to init it explicitly.
Signed-off-by: Simon Glass <sjg@chromium.org>
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| #
801f4f1b |
| 05-Mar-2015 |
Simon Glass <sjg@chromium.org> |
dm: x86: pci: Convert coreboot to use driver model for pci
Move coreboot-x86 over to driver model for PCI.
Signed-off-by: Simon Glass <sjg@chromium.org>
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| #
4e0114d9 |
| 30-Dec-2014 |
Stefano Babic <sbabic@denx.de> |
Merge branch 'master' of git://git.denx.de/u-boot
Signed-off-by: Stefano Babic <sbabic@denx.de>
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| #
d8046ff0 |
| 19-Dec-2014 |
Tom Rini <trini@ti.com> |
Merge git://git.denx.de/u-boot-x86
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| #
b71eec31 |
| 17-Dec-2014 |
Bin Meng <bmeng.cn@gmail.com> |
x86: ich6-gpio: Add Intel Tunnel Creek GPIO support
Intel Tunnel Creek GPIO register block is compatible with current ich6-gpio driver, except the offset and content of GPIO block base address regis
x86: ich6-gpio: Add Intel Tunnel Creek GPIO support
Intel Tunnel Creek GPIO register block is compatible with current ich6-gpio driver, except the offset and content of GPIO block base address register in the LPC PCI configuration space are different.
Use u16 instead of u32 to store the 16-bit I/O address of the GPIO registers so that it could support both Ivybridge and Tunnel Creek.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
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| #
b9206e61 |
| 15-Dec-2014 |
Tom Rini <trini@ti.com> |
Merge git://git.denx.de/u-boot-x86
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| #
2795573a |
| 12-Dec-2014 |
Bin Meng <bmeng.cn@gmail.com> |
x86: ich6-gpio: Move setup_pch_gpios() to board support codes
Movie setup_pch_gpios() in the ich6-gpio driver to the board support codes, so that the driver does not need to know any platform specif
x86: ich6-gpio: Move setup_pch_gpios() to board support codes
Movie setup_pch_gpios() in the ich6-gpio driver to the board support codes, so that the driver does not need to know any platform specific stuff (ie: include the platform specifc chipset header file).
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
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| #
f4e7e2d1 |
| 01-Dec-2014 |
Tom Rini <trini@ti.com> |
Merge git://git.denx.de/u-boot-x86
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| #
22e131ca |
| 15-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: chromebook_link: Enable the Chrome OS EC
Enable the Chrome OS EC so that it can be used from U-Boot.
Signed-off-by: Simon Glass <sjg@chromium.org>
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| #
65990d56 |
| 15-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: Remove board_early_init_r()
This function is not needed. Remove it to improve the generic init sequence slightly.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@
x86: Remove board_early_init_r()
This function is not needed. Remove it to improve the generic init sequence slightly.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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| #
746667f1 |
| 24-Nov-2014 |
Tom Rini <trini@ti.com> |
Merge git://git.denx.de/u-boot-x86
Conflicts: arch/x86/cpu/Makefile
Signed-off-by: Tom Rini <trini@ti.com>
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| #
437c2b7c |
| 13-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: chromebook_link: Enable GPIO support
Enable GPIO support and provide the required GPIO setup information to the driver.
Signed-off-by: Simon Glass <sjg@chromium.org>
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| #
8ef07571 |
| 13-Nov-2014 |
Simon Glass <sjg@chromium.org> |
x86: Add chromebook_link board
This board is a 'bare' version of the existing 'link 'board. It does not require coreboot to run, but is intended to start directly from the reset vector.
This initia
x86: Add chromebook_link board
This board is a 'bare' version of the existing 'link 'board. It does not require coreboot to run, but is intended to start directly from the reset vector.
This initial commit has place holders for a wide range of features. These will be added in follow-on patches and series. So far it cannot be booted as there is no ROM image produced, but it does build without errors.
Signed-off-by: Simon Glass <sjg@chromium.org>
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