| #
f1683aa7 |
| 06-Apr-2017 |
Simon Glass <sjg@chromium.org> |
board_f: Rename initdram() to dram_init()
This allows us to use the same DRAM init function on all archs. Add a dummy function for arc, which does not use DRAM init here.
Signed-off-by: Simon Glass
board_f: Rename initdram() to dram_init()
This allows us to use the same DRAM init function on all archs. Add a dummy function for arc, which does not use DRAM init here.
Signed-off-by: Simon Glass <sjg@chromium.org> [trini: Dummy function on nios2] Signed-off-by: Tom Rini <trini@konsulko.com>
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| #
088454cd |
| 31-Mar-2017 |
Simon Glass <sjg@chromium.org> |
board_f: Drop return value from initdram()
At present we cannot use this function as an init sequence call without a wrapper, since it returns the RAM size. Adjust it to set the RAM size in global_d
board_f: Drop return value from initdram()
At present we cannot use this function as an init sequence call without a wrapper, since it returns the RAM size. Adjust it to set the RAM size in global_data instead, and return 0 on success.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Stefan Roese <sr@denx.de>
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| #
52c41180 |
| 31-Mar-2017 |
Simon Glass <sjg@chromium.org> |
board_f: Drop board_type parameter from initdram()
It looks like only cm5200 and tqm8xx use this feature, so we don't really need it in generic code. Drop it and have the users access gd->board_type
board_f: Drop board_type parameter from initdram()
It looks like only cm5200 and tqm8xx use this feature, so we don't really need it in generic code. Drop it and have the users access gd->board_type directly.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Stefan Roese <sr@denx.de>
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| #
5b8031cc |
| 15-Jan-2016 |
Tom Rini <trini@konsulko.com> |
Add more SPDX-License-Identifier tags
In a number of places we had wordings of the GPL (or LGPL in a few cases) license text that were split in such a way that it wasn't caught previously. Convert
Add more SPDX-License-Identifier tags
In a number of places we had wordings of the GPL (or LGPL in a few cases) license text that were split in such a way that it wasn't caught previously. Convert all of these to the correct SPDX-License-Identifier tag.
Signed-off-by: Tom Rini <trini@konsulko.com>
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| #
f15ea6e1 |
| 10-Dec-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot/master' into 'u-boot-arm/master'
Conflicts: arch/arm/cpu/armv7/rmobile/Makefile doc/README.scrapyard
Needed manual fix: arch/arm/cpu/armv7/omap-common/Makefile board/compul
Merge branch 'u-boot/master' into 'u-boot-arm/master'
Conflicts: arch/arm/cpu/armv7/rmobile/Makefile doc/README.scrapyard
Needed manual fix: arch/arm/cpu/armv7/omap-common/Makefile board/compulab/cm_t335/u-boot.lds
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| #
77fdd6d1 |
| 02-Dec-2013 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx
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| #
5614e71b |
| 30-Sep-2013 |
York Sun <yorksun@freescale.com> |
Driver/DDR: Moving Freescale DDR driver to a common driver
Freescale DDR driver has been used for mpc83xx, mpc85xx, mpc86xx SoCs. The similar DDR controllers will be used for ARM-based SoCs.
Signed
Driver/DDR: Moving Freescale DDR driver to a common driver
Freescale DDR driver has been used for mpc83xx, mpc85xx, mpc86xx SoCs. The similar DDR controllers will be used for ARM-based SoCs.
Signed-off-by: York Sun <yorksun@freescale.com>
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| #
0dd38a35 |
| 25-Sep-2013 |
Priyanka Jain <Priyanka.Jain@freescale.com> |
powerpc: Fix CamelCase warnings in DDR related code
Some DDR related structures present in fsl_ddr_dimm_params.h, fsl_ddr_sdram.h, ddr_spd.h has various parameters with embedded acronyms capitalized
powerpc: Fix CamelCase warnings in DDR related code
Some DDR related structures present in fsl_ddr_dimm_params.h, fsl_ddr_sdram.h, ddr_spd.h has various parameters with embedded acronyms capitalized that trigger the CamelCase warning in checkpatch.pl
Convert those variable names to smallcase naming convention and modify all files which are using these structures with modified structures.
Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
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| #
712cf7ab |
| 03-Oct-2011 |
York Sun <yorksun@freescale.com> |
powerpc/mpc8xxx: Merge entries in DDR speed table
It is not necessary to keep multiple entries for the same setting in DDR speed tables. Merge them for smaller tables. Also restructure the tables fo
powerpc/mpc8xxx: Merge entries in DDR speed table
It is not necessary to keep multiple entries for the same setting in DDR speed tables. Merge them for smaller tables. Also restructure the tables for smaller size. Cleanup some typedefs.
Enforce strict checking for speed table. If DIMM is running at higher than known speed, try to use the highest speed setting. If rank is unknown, it has to panic.
Removed ODT overriding for P2020DS as it is not necessary.
Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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| #
1fed668b |
| 04-Oct-2011 |
Wolfgang Denk <wd@denx.de> |
Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx
* 'master' of git://git.denx.de/u-boot-mpc85xx: powerpc/p3060: Add SoC related support for P3060 platform powerpc/85xx: Add support for
Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx
* 'master' of git://git.denx.de/u-boot-mpc85xx: powerpc/p3060: Add SoC related support for P3060 platform powerpc/85xx: Add support for setting up RAID engine liodns on P5020 powerpc/85xx: Refactor some defines out of corenet_ds.h fm-eth: Add ability for board code to disable a port powerpc/mpc8548: Add workaround for erratum NMG_LBC103 powerpc/mpc8548: Add workaround for erratum NMG_DDR120 powerpc/mpc85xxcds: Fix PCI speed powerpc/mpc8548cds: Fix booting message powerpc/p4080: Add support for secure boot flow powerpc/85xx: Add Secure Boot support on P1010RDB for NOR, NAND & SPIFLASH powerpc/85xx: Add PBL & SECUREBOOT support on P3041/P5020DS boards powerpc/p2041rdb: remove watch dog related codes powerpc/p2041rdb: updated description of cpld command powerpc/p2041rdb: add more ddr frequencies support powerpc/p2041rdb: set sysclk according to status of physical switch SW1 powerpc/p2041rdb: update cpld reset command according to CPLD 2.0 powerpc/mpc8349emds: Migrate from spd_sdram to unified DDR driver powerpc/mpc83xx: Migrate from spd_sdram to unified DDR driver powerpc/mpc8xxx: Add DDR2 to unified DDR driver powerpc/mpc8xxx: Fix picos_to_mclk() and get_memory_clk_period_ps() powerpc/mpc8xxx: Add SPD EEPROM address for single controller 2 slots powerpc/mpc8xxx: Fix DDR code for empty first DIMM slot and enable DQS_en powerpc/85xx: Refactor P2041RDB to use common p_corenet files powerpc/85xx: refactor common P-Series CoreNet files for FSL boards powerpc/85xx: Enable CMD_REGINFO on corenet boards powerpc/85xx: p2041rdb - Remove unused 'execute' perm in TLB entries powerpc/85xx: Fix USB protocol definitions for P1020RDB powerpc/corenet_ds: Use separated speed tables for UDIMM and RDIMM powerpc/mpc8xxx: Move DDR RCW overriding to common code powerpc/mpc8xxx: Extend CWL table powerpc/85xx: Cleanup how SVR_MAJ() is defined on MPC8536 powerpc/85xx: Cleanup extern in corenet_ds board code powerpc/p2041rdb: Add ethernet support on P2041RDB board powerpc/85xx: Add networking support to P1023RDS powerpc/hydra: Add ethernet support on P5020/P3041 DS boards powerpc/85xx: Add FMan ethernet support to P4080DS powerpc/85xx: Add support for FMan ethernet in Independent mode powerpc/mpc8548cds: Cleanup mpc8548cds.c powerpc/mp: add support for discontiguous cores powerpc/85xx: corenet_ds - Remove unused 'execute' perm in TLB entries fdt: Add new fdt_create_phandle helper fdt: Rename fdt_create_phandle to fdt_set_phandle powerpc/85xx: Fix compile warnings/errors if CONFIG_SYS_DPAA_FMAN isn't set fsl_ifc: Add the workaround for erratum IFC A-003399(enabled on P1010) powerpc/P1010: Add workaround for erratum P1010-A003549 (related to IFC) fsl_ifc: Add the workaround for erratum IFC-A002769 (enable on P1010) powerpc/85xx: Expanding the window of CCSRBAR in AS=1 from 4k to 1M powerpc/85xx: Add NAND/NAND_SPL support to P1010RDB nand: Freescale Integrated Flash Controller NAND support powerpc/85xx: Add basic support for P1010RDB powerpc/85xx: Add support for new P102x/P2020 RDB style boards powerpc/85xx: relocate CCSR before creating the initial RAM area powerpc/85xx: introduce and document CONFIG_SYS_CCSRBAR macros powerpc/85xx: Enable internal USB UTMI PHY on p204x/p3041/p50x0 powerpc/85xx: Add ULPI and UTMI USB Phy support for P1010/P1014
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| #
47784af7 |
| 22-Sep-2011 |
Shaohui Xie <Shaohui.Xie@freescale.com> |
powerpc/p2041rdb: add more ddr frequencies support
This table covers DDR frequencies from 666 to 1666. Frequencies 666, 833, 1000, 1066 and 1333 were verified on this board with SO-DIMM (UG51U6400N8
powerpc/p2041rdb: add more ddr frequencies support
This table covers DDR frequencies from 666 to 1666. Frequencies 666, 833, 1000, 1066 and 1333 were verified on this board with SO-DIMM (UG51U6400N8SU-ACF).
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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| #
dd620b26 |
| 29-Jul-2011 |
Wolfgang Denk <wd@denx.de> |
Merge branch 'master' of /home/wd/git/u-boot/custodians
* 'master' of /home/wd/git/u-boot/custodians: powerpc/8xxx: Remove dependency on <usb.h> powerpc/85xx: enable USB2 gadget mode for corenet
Merge branch 'master' of /home/wd/git/u-boot/custodians
* 'master' of /home/wd/git/u-boot/custodians: powerpc/8xxx: Remove dependency on <usb.h> powerpc/85xx: enable USB2 gadget mode for corenet ds board powerpc/85xx: verify the device tree before booting Linux MPC8xxx: drop redundant boot messages powerpc/85xx: Fix build failure for P1023RDS powerpc/p2041rdb: Enable SATA support powerpc/85xx: Cleanup handling of PVR detection for e500/e500mc/e5500 powerpc/85xx: Fix up clock_freq property in CAN node of dts 85xx: enable FDT support for STX SSA board powerpc/85xx: provide 85xx flush_icache for cmd_cache powerpc/p2041rdb: Enable backside L2 cache support powerpc/85xx: Handle the lack of L2 cache on P2040/P2040E powerpc/85xx: Add support for P2041[e] XAUI in SERDES powerpc/85xx: Rename P2040 id & SERDES to P2041 powerpc/85xx: Adding configuration for DCSRCR to enable 32M access powerpc/85xx: Fix setting of EPAPR_MAGIC value
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| #
21cd5815 |
| 25-Jul-2011 |
Wolfgang Denk <wd@denx.de> |
MPC8xxx: drop redundant boot messages
Current code would print RAM size information like this:
DRAM: DDR: 256 MiB (DDR1, 64-bit, CL=2, ECC off)
Turn a number of printf()s into debug() to get rid
MPC8xxx: drop redundant boot messages
Current code would print RAM size information like this:
DRAM: DDR: 256 MiB (DDR1, 64-bit, CL=2, ECC off)
Turn a number of printf()s into debug() to get rid of the redundant "DDR: " string like this:
DRAM: 256 MiB (DDR1, 64-bit, CL=2, ECC off)
Signed-off-by: Wolfgang Denk <wd@denx.de> Acked-by: York Sun <yorksun@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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| #
1c6d00c2 |
| 18-Jul-2011 |
Wolfgang Denk <wd@denx.de> |
Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx
* 'master' of git://git.denx.de/u-boot-mpc85xx: powerpc/p2041rdb: Add p2041rdb board support powerpc/85xx: Fix detection of P1017E pow
Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx
* 'master' of git://git.denx.de/u-boot-mpc85xx: powerpc/p2041rdb: Add p2041rdb board support powerpc/85xx: Fix detection of P1017E powerpc/mpc8548cds: Remove incorrect DDR_MSYNC_IN erratum define
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| #
4f1d1b7d |
| 07-Jul-2011 |
Mingkai Hu <Mingkai.hu@freescale.com> |
powerpc/p2041rdb: Add p2041rdb board support
P2041RDB Specification: ----------------------- Memory subsystem: * 4Gbyte unbuffered DDR3 SDRAM SO-DIMM(64bit bus) * 128 Mbyte NOR flash single-chip m
powerpc/p2041rdb: Add p2041rdb board support
P2041RDB Specification: ----------------------- Memory subsystem: * 4Gbyte unbuffered DDR3 SDRAM SO-DIMM(64bit bus) * 128 Mbyte NOR flash single-chip memory * 256 Kbit M24256 I2C EEPROM * 16 Mbyte SPI memory * SD connector to interface with the SD memory card
Ethernet: * dTSEC1: connected to the Vitesse SGMII PHY (VSC8221) * dTSEC2: connected to the Vitesse SGMII PHY (VSC8221) * dTSEC3: connected to the Vitesse SGMII PHY (VSC8221) * dTSEC4: connected to the Vitesse RGMII PHY (VSC8641) * dTSEC5: connected to the Vitesse RGMII PHY (VSC8641)
PCIe: * Lanes E, F, G and H of Bank1 are connected to one x4 PCIe SLOT1 * Lanes C and Land D of Bank2 are connected to one x4 PCIe SLOT2
SATA: Lanes C and Land D of Bank2 are connected to two SATA connectors
USB 2.0: connected via a internal UTMI PHY to two TYPE-A interfaces
I2C: * I2C1: Real time clock, Temperature sensor, Memory module * I2C2: Vcore Regulator, 256Kbit I2C Bus EEPROM, PCIe slot1/2
UART: supports two UARTs up to 115200 bps for console
Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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