mpc85xx boards: initdram() cleanup/bugfix

Correct initdram to use phys_size_t to represent the size of
dram; instead of changing this all over the place, and correcting
all the other random errors I

mpc85xx boards: initdram() cleanup/bugfix

Correct initdram to use phys_size_t to represent the size of
dram; instead of changing this all over the place, and correcting
all the other random errors I've noticed, create a
common initdram that is used by all non-corenet 85xx parts. Most
of the initdram() functions were identical, with 2 common differences:

1) DDR tlbs for the fixed_sdram case were set up in initdram() on
some boards, and were part of the tlb_table on others. I have
changed them all over to the initdram() method - we shouldn't
be accessing dram before this point so they don't need to be
done sooner, and this seems cleaner.

2) Parts that require the DDR11 erratum workaround had different
implementations - I have adopted the version from the Freescale
errata document. It also looks like some of the versions were
buggy, and, depending on timing, could have resulted in the
DDR controller being disabled. This seems bad.

The xpedite boards had a common/fsl_8xxx_ddr.c; with this
change only the 517 board uses this so I have moved the ddr code
into that board's directory in xpedite517x.c

Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
Tested-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

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powerpc/8xxx: Replace is_fsl_pci_cfg with is_serdes_configured

Now that we have serdes support for all 85xx/86xx/Pxxx chips we can
replace the is_fsl_pci_cfg() code with the is_serdes_configured().

powerpc/8xxx: Replace is_fsl_pci_cfg with is_serdes_configured

Now that we have serdes support for all 85xx/86xx/Pxxx chips we can
replace the is_fsl_pci_cfg() code with the is_serdes_configured().

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

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fsl: Clean up printing of PCI boot info

Previously boards used a variety of indentations, newline styles, and
colon styles for the PCI information that is printed on bootup. This
patch unifies the

fsl: Clean up printing of PCI boot info

Previously boards used a variety of indentations, newline styles, and
colon styles for the PCI information that is printed on bootup. This
patch unifies the style to look like:

...
NAND: 1024 MiB
PCIE1: connected as Root Complex
Scanning PCI bus 01
04 01 8086 1010 0200 00
04 01 8086 1010 0200 00
03 00 10b5 8112 0604 00
02 01 10b5 8518 0604 00
02 02 10b5 8518 0604 00
08 00 1957 0040 0b20 00
07 00 10b5 8518 0604 00
09 00 10b5 8112 0604 00
07 01 10b5 8518 0604 00
07 02 10b5 8518 0604 00
06 00 10b5 8518 0604 00
02 03 10b5 8518 0604 00
01 00 10b5 8518 0604 00
PCIE1: Bus 00 - 0b
PCIE2: connected as Root Complex
Scanning PCI bus 0d
0d 00 1957 0040 0b20 00
PCIE2: Bus 0c - 0d
In: serial
...

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
CC: wd@denx.de
CC: sr@denx.de
CC: galak@kernel.crashing.org

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Merge branch 'master' of /home/wd/git/u-boot/master

Merge branch 'master' of /home/wd/git/u-boot/custodians

powerpc/85xx & 86xx: Rework ft_fsl_pci_setup to not require aliases

Previously we used an alias the pci node to determine which node to
fixup or delete. Now we use the new fdt_node_offset_by_compat

powerpc/85xx & 86xx: Rework ft_fsl_pci_setup to not require aliases

Previously we used an alias the pci node to determine which node to
fixup or delete. Now we use the new fdt_node_offset_by_compat_reg to
find the node to update.

Additionally, we replace the code in each board with a single macro call
that makes assumes uniform naming and reduces duplication in this area.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

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Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx

83xx/85xx/86xx: LBC register cleanup

Currently, 83xx, 86xx, and 85xx have a lot of duplicated code
dedicated to defining and manipulating the LBC registers. Merge
this into a single spot.

To do th

83xx/85xx/86xx: LBC register cleanup

Currently, 83xx, 86xx, and 85xx have a lot of duplicated code
dedicated to defining and manipulating the LBC registers. Merge
this into a single spot.

To do this, we have to decide on a common name for the data structure
that holds the lbc registers - it will now be known as fsl_lbc_t, and we
adopt a common name for the immap layouts that include the lbc - this was
previously known as either im_lbc or lbus; use the former.

In addition, create accessors for the BR/OR regs that use in/out_be32
and use those instead of the mismash of access methods currently in play.

I have done a successful ppc build all and tested a board or two from
each processor family.

Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

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Merge branch 'master' of git://git.denx.de/u-boot-arm

Merge branch 't-ml-master' into t-master

PCIe, USB: Replace 'end point' references with 'endpoint'

When referring to PCIe and USB 'endpoint' is the standard naming
convention.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Acked-by: Stef

PCIe, USB: Replace 'end point' references with 'endpoint'

When referring to PCIe and USB 'endpoint' is the standard naming
convention.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Acked-by: Stefan Roese <sr@denx.de>
Acked-by: Remy Bohmer <linux@bohmer.net>

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Merge branch 'master' of git://git.denx.de/u-boot-arm

Conflicts:

cpu/arm_cortexa8/s5pc1xx/cache.c
include/asm-arm/arch-s5pc1xx/sys_proto.h
include/sja1000.h

Signed-off-by: Minkyu Kang <mk7.kang

Merge branch 'master' of git://git.denx.de/u-boot-arm

Conflicts:

cpu/arm_cortexa8/s5pc1xx/cache.c
include/asm-arm/arch-s5pc1xx/sys_proto.h
include/sja1000.h

Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>

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ppc/85xx: Clean up MPC8548 CDS PCI setup code

Use new fsl_pci_init_port() that reduces amount of duplicated code in the
board ports, use IO accessors and clean up printing of status info.

Signed-of

ppc/85xx: Clean up MPC8548 CDS PCI setup code

Use new fsl_pci_init_port() that reduces amount of duplicated code in the
board ports, use IO accessors and clean up printing of status info.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

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Merge branch 'master' of git://git.denx.de/u-boot-arm

Conflicts:

board/eukrea/cpu9260/cpu9260.c
drivers/serial/serial_s5pc1xx.c
include/asm-arm/arch-s5pc1xx/clock.h
include/asm-arm/arch-s5pc1xx

Merge branch 'master' of git://git.denx.de/u-boot-arm

Conflicts:

board/eukrea/cpu9260/cpu9260.c
drivers/serial/serial_s5pc1xx.c
include/asm-arm/arch-s5pc1xx/clock.h
include/asm-arm/arch-s5pc1xx/gpio.h
include/asm-arm/arch-s5pc1xx/pwm.h
include/asm-arm/arch-s5pc1xx/uart.h
include/configs/cpu9260.h
include/configs/cpuat91.h
include/configs/davinci_dm355evm.h
include/linux/mtd/samsung_onenand.h

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Merge branch 'reloc'

ppc/8xxx: Refactor code to determine if PCI is enabled & agent/host

Refactor the code into a simple bitmask lookup table that determines if
a given PCI controller is enabled and if its in host/root-

ppc/8xxx: Refactor code to determine if PCI is enabled & agent/host

Refactor the code into a simple bitmask lookup table that determines if
a given PCI controller is enabled and if its in host/root-complex or
agent/end-point mode.

Each processor in the PQ3/MPC86xx family specified different encodings
for the cfg_host_agt[] and cfg_IO_ports[] boot strapping signals.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

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ppc: Remove pci config table pointer relocation fixups

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>

ppc/8xxx: Refactor code to determine if PCI is enabled & agent/host

Refactor the code into a simple bitmask lookup table that determines if
a given PCI controller is enabled and if its in host/root-

ppc/8xxx: Refactor code to determine if PCI is enabled & agent/host

Refactor the code into a simple bitmask lookup table that determines if
a given PCI controller is enabled and if its in host/root-complex or
agent/end-point mode.

Each processor in the PQ3/MPC86xx family specified different encodings
for the cfg_host_agt[] and cfg_IO_ports[] boot strapping signals.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

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Merge branch 'next' of ../next

pci/fsl_pci_init: Fold fsl_pci_setup_inbound_windows into fsl_pci_init

Every platform that calls fsl_pci_init calls fsl_pci_setup_inbound_windows
before it calls fsl_pci_init. There isn't any reaso

pci/fsl_pci_init: Fold fsl_pci_setup_inbound_windows into fsl_pci_init

Every platform that calls fsl_pci_init calls fsl_pci_setup_inbound_windows
before it calls fsl_pci_init. There isn't any reason to just call it
from fsl_pci_init and simplify things a bit.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

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pci/fsl_pci_init: Fold pci_setup_indirect into fsl_pci_init

Every platform that calls fsl_pci_init calls pci_setup_indirect before
it calls fsl_pci_init. There isn't any reason to just call it from

pci/fsl_pci_init: Fold pci_setup_indirect into fsl_pci_init

Every platform that calls fsl_pci_init calls pci_setup_indirect before
it calls fsl_pci_init. There isn't any reason to just call it from
fsl_pci_init and simplify things a bit.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

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Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx

fsl_pci: Move prototypes into fsl_pci.h and remove explicit externs

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

fsl_pci: Renamed immap_fsl_pci.h to fsl_pci.h

Rename the pci header for FSL HW so we can move some prototypes
in there and stop doing explicit externs

Signed-off-by: Kumar Gala <galak@kernel.crashi

fsl_pci: Renamed immap_fsl_pci.h to fsl_pci.h

Rename the pci header for FSL HW so we can move some prototypes
in there and stop doing explicit externs

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

show more ...

Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx