| #
f15ea6e1 |
| 10-Dec-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot/master' into 'u-boot-arm/master'
Conflicts:
arch/arm/cpu/armv7/rmobile/Makefile
doc/README.scrapyard
Needed manual fix:
arch/arm/cpu/armv7/omap-common/Makefile
board/compul
Merge branch 'u-boot/master' into 'u-boot-arm/master'
Conflicts:
arch/arm/cpu/armv7/rmobile/Makefile
doc/README.scrapyard
Needed manual fix:
arch/arm/cpu/armv7/omap-common/Makefile
board/compulab/cm_t335/u-boot.lds
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| #
77fdd6d1 |
| 02-Dec-2013 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx
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| #
5614e71b |
| 30-Sep-2013 |
York Sun <yorksun@freescale.com> |
Driver/DDR: Moving Freescale DDR driver to a common driver
Freescale DDR driver has been used for mpc83xx, mpc85xx, mpc86xx SoCs.
The similar DDR controllers will be used for ARM-based SoCs.
Signed
Driver/DDR: Moving Freescale DDR driver to a common driver
Freescale DDR driver has been used for mpc83xx, mpc85xx, mpc86xx SoCs.
The similar DDR controllers will be used for ARM-based SoCs.
Signed-off-by: York Sun <yorksun@freescale.com>
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| #
0dd38a35 |
| 25-Sep-2013 |
Priyanka Jain <Priyanka.Jain@freescale.com> |
powerpc: Fix CamelCase warnings in DDR related code
Some DDR related structures present in fsl_ddr_dimm_params.h, fsl_ddr_sdram.h, ddr_spd.h
has various parameters with embedded acronyms capitalized
powerpc: Fix CamelCase warnings in DDR related code
Some DDR related structures present in fsl_ddr_dimm_params.h, fsl_ddr_sdram.h, ddr_spd.h
has various parameters with embedded acronyms capitalized that trigger the CamelCase
warning in checkpatch.pl
Convert those variable names to smallcase naming convention and modify all files
which are using these structures with modified structures.
Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
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| #
b98d9341 |
| 13-Aug-2013 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx
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| #
c63e1370 |
| 25-Jun-2013 |
York Sun <yorksun@freescale.com> |
powerpc/mpc8xxx: Add memory reset control
JEDEC spec requires the clocks to be stable before deasserting reset
signal for RDIMMs. Clocks start when any chip select is enabled and
clock control regis
powerpc/mpc8xxx: Add memory reset control
JEDEC spec requires the clocks to be stable before deasserting reset
signal for RDIMMs. Clocks start when any chip select is enabled and
clock control register is set. This patch also adds the interface to
toggle memory reset signal if needed by the boards.
Signed-off-by: York Sun <yorksun@freescale.com>
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| #
326ea986 |
| 31-Jul-2013 |
Stefano Babic <sbabic@denx.de> |
Merge git://git.denx.de/u-boot-arm
Conflicts:
board/freescale/mx6qsabrelite/Makefile
board/freescale/mx6qsabrelite/mx6qsabrelite.c
include/configs/mx6qsabrelite.h
Signed-off-by: Stefano Babic <s
Merge git://git.denx.de/u-boot-arm
Conflicts:
board/freescale/mx6qsabrelite/Makefile
board/freescale/mx6qsabrelite/mx6qsabrelite.c
include/configs/mx6qsabrelite.h
Signed-off-by: Stefano Babic <sbabic@denx.de>
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| #
8b485ba1 |
| 25-Jul-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot/master' into u-boot-arm/master
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| #
1a459660 |
| 08-Jul-2013 |
Wolfgang Denk <wd@denx.de> |
Add GPL-2.0+ SPDX-License-Identifier to source files
Signed-off-by: Wolfgang Denk <wd@denx.de>
[trini: Fixup common/cmd_io.c]
Signed-off-by: Tom Rini <trini@ti.com>
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| #
9cd9b34d |
| 23-Feb-2013 |
Stefano Babic <sbabic@denx.de> |
Merge branch 'master' of git://git.denx.de/u-boot-arm
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| #
9a32084e |
| 04-Feb-2013 |
Kim Phillips <kim.phillips@freescale.com> |
Merge branch 'master' of git://git.denx.de/u-boot
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| #
41d91011 |
| 14-Jan-2013 |
Prabhakar Kushwaha <prabhakar@freescale.com> |
powerpc/85xx: Add BSC9132QDS support
BSC9132QDS is a Freescale reference design board for BSC9132 SoC.
BSC9132 SOC is an integrated device that targets the evolving Microcell,
Picocell, and Enterpri
powerpc/85xx: Add BSC9132QDS support
BSC9132QDS is a Freescale reference design board for BSC9132 SoC.
BSC9132 SOC is an integrated device that targets the evolving Microcell,
Picocell, and Enterprise-Femto base station market subsegments.
It combines Power Architecture e500v2 and DSP StarCore SC3850 core
technologies with MAPLE-B2F baseband acceleration processing elements.
BSC9132QDS Overview
--------------------
2Gbyte DDR3 (on board DDR), Dual Ranki
32Mbyte 16bit NOR flash
128Mbyte 2K page size NAND Flash
256 Kbit M24256 I2C EEPROM
128 Mbit SPI Flash memory
SD slot
USB-ULPI
eTSEC1: Connected to SGMII PHY
eTSEC2: Connected to SGMII PHY
PCIe
CPRI
SerDes
I2C RTC
DUART interface: supports one UARTs up to 115200 bps for console display
Apart from the above it also consists various peripherals to support DSP
functionalities.
This patch adds support for mainly Power side functionalities and peripherals
Signed-off-by: Naveen Burmi <NaveenBurmi@freescale.com>
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
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