| #
6b29a395 |
| 30-Nov-2016 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-mpc85xx
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| #
b41f192b |
| 18-Nov-2016 |
York Sun <york.sun@nxp.com> |
powerpc: B4420: Remove macro CONFIG_PPC_B4420
Replace CONFIG_PPC_B4420 with ARCH_B4420 in Kconfig and clean up existing macros.
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| #
57dc53a7 |
| 08-Feb-2016 |
Tom Rini <trini@konsulko.com> |
Merge branch 'agust@denx.de' of git://git.denx.de/u-boot-staging
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| #
a187559e |
| 06-Feb-2016 |
Bin Meng <bmeng.cn@gmail.com> |
Use correct spelling of "U-Boot"
Correct spelling of "U-Boot" shall be used in all written text (documentation, comments in source files etc.).
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed
Use correct spelling of "U-Boot"
Correct spelling of "U-Boot" shall be used in all written text (documentation, comments in source files etc.).
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Heiko Schocher <hs@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Minkyu Kang <mk7.kang@samsung.com>
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| #
192bc694 |
| 30-Dec-2015 |
Ben Whitten <ben.whitten@gmail.com> |
Fix GCC format-security errors and convert sprintfs.
With format-security errors turned on, GCC picks up the use of sprintf with a format parameter not being a string literal.
Simple uses of sprint
Fix GCC format-security errors and convert sprintfs.
With format-security errors turned on, GCC picks up the use of sprintf with a format parameter not being a string literal.
Simple uses of sprintf are also converted to use strcpy.
Signed-off-by: Ben Whitten <ben.whitten@gmail.com> Acked-by: Wolfgang Denk <wd@denx.de> Reviewed-by: Tom Rini <trini@konsulko.com>
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| #
5f5620ab |
| 12-Nov-2015 |
Stefano Babic <sbabic@denx.de> |
Merge git://git.denx.de/u-boot
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| #
588eec2a |
| 30-Oct-2015 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriq
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| #
8225b2fd |
| 26-Oct-2015 |
Shaohui Xie <Shaohui.Xie@freescale.com> |
net: Move some header files to include/
The fsl_dtsec.h & fsl_tgec.h & fsl_fman.h can be shared on both ARM and PPC, move it out of ppc to include/, and change the path in drivers accordingly.
Sign
net: Move some header files to include/
The fsl_dtsec.h & fsl_tgec.h & fsl_fman.h can be shared on both ARM and PPC, move it out of ppc to include/, and change the path in drivers accordingly.
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: Gong Qianyu <Qianyu.Gong@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
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| #
272a1acf |
| 08-Dec-2014 |
Tom Rini <trini@ti.com> |
Merge git://git.denx.de/u-boot-mpc85xx
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| #
e2544e7a |
| 13-Nov-2014 |
Suresh Gupta <suresh.gupta@freescale.com> |
B4860QDS: Enable enet port as per fsl_b4860_serdes2 string in hwconfig
In B4860QDS board SerDes2 lanes EFGH either go to SFP or AMC riser card slot2 so either DTSEC3/DTSEC4 or TGEC1/TGEC2 should be
B4860QDS: Enable enet port as per fsl_b4860_serdes2 string in hwconfig
In B4860QDS board SerDes2 lanes EFGH either go to SFP or AMC riser card slot2 so either DTSEC3/DTSEC4 or TGEC1/TGEC2 should be accessible. This Patch enables DTSEC3/DTSEC4 or TGEC1/TGEC2 on bases of user specified string fsl_b4860_serdes2:sfp_amc=amc or fsl_b4860_serdes2:sfp_amc=sfp respectively in hwconfig.
Signed-off-by: Suresh Gupta <suresh.gupta@freescale.com> Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
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| #
90e80dc6 |
| 13-Nov-2014 |
Shaohui Xie <Shaohui.Xie@freescale.com> |
powerpc/b4860qds: dtb fixup for xfi
Since xfi has no phy, we delete the property "phy-handle" and use a "fixed-link" property for a xfi port.
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
powerpc/b4860qds: dtb fixup for xfi
Since xfi has no phy, we delete the property "phy-handle" and use a "fixed-link" property for a xfi port.
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
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| #
89b94d85 |
| 13-Nov-2014 |
Shaohui Xie <Shaohui.Xie@freescale.com> |
powerpc/b4860qds: add xfi support
We need following changes to make xfi work on B4: 1. set cross-point switch VSC3308 to use sfp config when running xfi; 2. add 10G interface check for xfi; 3. set p
powerpc/b4860qds: add xfi support
We need following changes to make xfi work on B4: 1. set cross-point switch VSC3308 to use sfp config when running xfi; 2. add 10G interface check for xfi; 3. set phy address for xfi so the 10G ports can be registered by mdio;
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
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| #
f1d8074c |
| 12-Nov-2014 |
Shaveta Leekha <shaveta@freescale.com> |
B4860QDS: SGMII related updates
- Enable SGMII support for 0x8d Serdes 2 protocol. - Correct Phy address for DTSECx for 0x8d/0xb2 Serdes 2 protocol. - Updated debug statement - Add Alter
B4860QDS: SGMII related updates
- Enable SGMII support for 0x8d Serdes 2 protocol. - Correct Phy address for DTSECx for 0x8d/0xb2 Serdes 2 protocol. - Updated debug statement - Add Alternate LC VCO protocols(0x8d-->0x8c, 0xb2-->0xb1) - Rename onboard PHY address defines for more readability - Add these new Defines in B4860QDS.h file
Signed-off-by: Shaveta Leekha <shaveta@freescale.com> Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: Suresh Gupta <suresh.gupta@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
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| #
1cad23c5 |
| 04-Apr-2014 |
Stefano Babic <sbabic@denx.de> |
Merge branch 'master' of git://git.denx.de/u-boot-arm into master
Conflicts: arch/arm/cpu/arm926ejs/mxs/mxsimage.mx23.cfg arch/arm/cpu/arm926ejs/mxs/mxsimage.mx28.cfg
Signed-off-by: Stefano Babic
Merge branch 'master' of git://git.denx.de/u-boot-arm into master
Conflicts: arch/arm/cpu/arm926ejs/mxs/mxsimage.mx23.cfg arch/arm/cpu/arm926ejs/mxs/mxsimage.mx28.cfg
Signed-off-by: Stefano Babic <sbabic@denx.de>
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| #
247161b8 |
| 08-Mar-2014 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx
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| #
c7d506d4 |
| 17-Feb-2014 |
poonam aggrwal <poonam.aggrwal@freescale.com> |
85xx/b4860: Alternate serdes protocols for B4860/B4420
On B4860 and B4420, some serdes protocols can be used with LC VCO as well as Ring VCO options.
Addded Alternate options with LC VCO for such p
85xx/b4860: Alternate serdes protocols for B4860/B4420
On B4860 and B4420, some serdes protocols can be used with LC VCO as well as Ring VCO options.
Addded Alternate options with LC VCO for such protocols. For example protocol 0x2a on srds 1 becomes 0x29 if it is LC VCO.
The alternate option has the same functionality as the original option; the only difference being LC VCO rather than Ring VCO.
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
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| #
ffee1dde |
| 04-Sep-2013 |
Zhao Qiang <B45475@freescale.com> |
SGMII:fix PHY addresses for QSGMII Riser Card working in SGMII mode
Fix PHY addresses for QSGMII Riser Card working in SGMII mode on board P3041/P5020/P4080/P5040/B4860.
QSGMII Riser Card can work
SGMII:fix PHY addresses for QSGMII Riser Card working in SGMII mode
Fix PHY addresses for QSGMII Riser Card working in SGMII mode on board P3041/P5020/P4080/P5040/B4860.
QSGMII Riser Card can work in SGMII mode, but having the different PHY addresses. So the following steps should be done: 1. Confirm whether QSGMII Riser Card is used. 2. If yes, set the proper PHY address. Generally, the function is_qsgmii_riser_card() is for step 1, and set_sgmii_phy() for step 2.
However, there are still some special situations, take P5040 and B4860 as examples, the PHY addresses need to be changed when serdes protocol is changed, so it is necessary to confirm the protocol before setting PHY addresses.
Signed-off-by: Zhao Qiang <B45475@freescale.com>
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| #
b98d9341 |
| 13-Aug-2013 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx
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| #
cb033741 |
| 02-Jul-2013 |
Shaveta Leekha <shaveta@freescale.com> |
board/b4860qds: Add support for configuring SerDes1 Refclks
1) Add support in B4860 board files for using IDT driver where IDT8T49N222A is a low phase noise Frequency Translator / Synthesizer
board/b4860qds: Add support for configuring SerDes1 Refclks
1) Add support in B4860 board files for using IDT driver where IDT8T49N222A is a low phase noise Frequency Translator / Synthesizer that generate different refclks for SerDes modules, used this driver for reconfiguring SerDes1 Refclks(based on SerDes1 protocols) for CPRI to work. CPRI works on 122.88MHz and default refclks coming on board are not suitable for it 2) Move SerDes1 refclk1 source selection from eth_b4860qds.c file to b4860qds board file, as SerDes1 Refclk1 would come from PHY MUX in case of certain protocols, that have been checked here. This change would make on board SGMIIs to work 3) Add I2C addresses for IDT8T49N222A devices in board/include file 4) Add define for PCA-I2C bus multiplexer, on which IDT devices exist
Signed-off-by: Shaveta Leekha <shaveta@freescale.com> Acked-by: York Sun <yorksun@freescale.com>
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| #
326ea986 |
| 31-Jul-2013 |
Stefano Babic <sbabic@denx.de> |
Merge git://git.denx.de/u-boot-arm
Conflicts: board/freescale/mx6qsabrelite/Makefile board/freescale/mx6qsabrelite/mx6qsabrelite.c include/configs/mx6qsabrelite.h
Signed-off-by: Stefano Babic <s
Merge git://git.denx.de/u-boot-arm
Conflicts: board/freescale/mx6qsabrelite/Makefile board/freescale/mx6qsabrelite/mx6qsabrelite.c include/configs/mx6qsabrelite.h
Signed-off-by: Stefano Babic <sbabic@denx.de>
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| #
8b485ba1 |
| 25-Jul-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot/master' into u-boot-arm/master
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| #
1a459660 |
| 08-Jul-2013 |
Wolfgang Denk <wd@denx.de> |
Add GPL-2.0+ SPDX-License-Identifier to source files
Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com>
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| #
a19b0dd6 |
| 30-May-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot/master' into 'u-boot-arm/master'
Conflicts: common/cmd_fpga.c drivers/usb/host/ohci-at91.c
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| #
16d88f41 |
| 25-Mar-2013 |
Suresh Gupta <suresh.gupta@freescale.com> |
Enable XAUI interface for B4860QDS
- Added SERDES2 PRTCLs = 0x98, 0x9E - Default Phy Addresses for Teranetics PHY on XAUI card The PHY addresses of Teranetics PHY on XAUI riser card are assigned b
Enable XAUI interface for B4860QDS
- Added SERDES2 PRTCLs = 0x98, 0x9E - Default Phy Addresses for Teranetics PHY on XAUI card The PHY addresses of Teranetics PHY on XAUI riser card are assigned based on the slot it is in. Switches SW4[2:4] and SW6[2:4] on AMC2PEX-2S On B4860QDS, AMC2PEX card decide the PHY addresses on slot1 and slot2 - Configure MDIO for 10Gig Mac
Signed-off-by: Suresh Gupta <suresh.gupta@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
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| #
9cd9b34d |
| 23-Feb-2013 |
Stefano Babic <sbabic@denx.de> |
Merge branch 'master' of git://git.denx.de/u-boot-arm
|