| 42fde305 | 04-Aug-2015 |
Simon Glass <sjg@chromium.org> |
x86: Add support for passing tables into U-Boot
The EFI stub provides information to U-Boot in a table. This includes the
memory map which is needed to decide where to relocate U-Boot. Collect this
x86: Add support for passing tables into U-Boot
The EFI stub provides information to U-Boot in a table. This includes the
memory map which is needed to decide where to relocate U-Boot. Collect this
information in the early init code and store it in global_data.
Fix up the BIST code at the same time since we don't have it when booting
from EFI and can assume it is 0.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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| 867a6ac8 | 31-Jul-2015 |
Simon Glass <sjg@chromium.org> |
efi: Add start-up library code
When running as an EFI application, U-Boot must request memory from EFI,
and provide access to the boot services U-Boot needs.
Add library code to perform these tasks
efi: Add start-up library code
When running as an EFI application, U-Boot must request memory from EFI,
and provide access to the boot services U-Boot needs.
Add library code to perform these tasks. This includes efi_main() which is
the entry point from EFI. U-Boot is built as a shared library.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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| 0d9edd2d | 31-Jul-2015 |
Simon Glass <sjg@chromium.org> |
x86: Drop unused copy_fdt_to_ram()
This is now handled by generic U-Boot code so we do not need an x86 version.
It is no-longer called, so remove it.
Signed-off-by: Simon Glass <sjg@chromium.org>
R
x86: Drop unused copy_fdt_to_ram()
This is now handled by generic U-Boot code so we do not need an x86 version.
It is no-longer called, so remove it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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| e7cd070d | 22-Jul-2015 |
Bin Meng <bmeng.cn@gmail.com> |
x86: qemu: Enable I/O APIC chip select on PIIX3
The PIIX3 chipset does not integrate an I/O APIC, instead it supports
connecting to an external I/O APIC which needs to be enabled manually.
Signed-o
x86: qemu: Enable I/O APIC chip select on PIIX3
The PIIX3 chipset does not integrate an I/O APIC, instead it supports
connecting to an external I/O APIC which needs to be enabled manually.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
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| 07545d86 | 23-Jun-2015 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Generate a valid MultiProcessor (MP) table
Implement write_mp_table() to create a minimal working MP table.
This includes an MP floating table, a configuration table header
and all of the 5 bas
x86: Generate a valid MultiProcessor (MP) table
Implement write_mp_table() to create a minimal working MP table.
This includes an MP floating table, a configuration table header
and all of the 5 base configuration table entries. The I/O interrupt
assignment table entry is created based on the same information used
in the creation of PIRQ routing table from device tree. A check
duplicated entry logic is applied to prevent writing multiple I/O
interrupt entries with the same information.
Use a Kconfig option GENERATE_MP_TABLE to tell U-Boot whether we
need actually write the MP table at the F seg, just like we did for
PIRQ routing and SFI tables. With MP table existence, linux kernel
will switch to I/O APIC and local APIC to process all the peripheral
interrupts instead of 8259 PICs. This takes full advantage of the
multicore hardware and the SMP kernel.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
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