History log of /rk3399_rockchip-uboot/arch/x86/include/asm/arch-baytrail/fsp/fsp_vpd.h (Results 1 – 11 of 11)
Revision Date Author Comments
# f0a1ad46 05-Jun-2017 Tom Rini <trini@konsulko.com>

Merge git://git.denx.de/u-boot-x86


# f8f291b0 31-May-2017 Bin Meng <bmeng.cn@gmail.com>

x86: baytrail: Change lpe/lpss-sio/scc FSP properties to integer

At present lpe/lpss-sio/scc FSP properties are all boolean, but in
fact for "enable-lpe" it has 3 possible options. This adds macros

x86: baytrail: Change lpe/lpss-sio/scc FSP properties to integer

At present lpe/lpss-sio/scc FSP properties are all boolean, but in
fact for "enable-lpe" it has 3 possible options. This adds macros
for these options and change the property from a boolean type to
an integer type, and change their names to explicitly indicate what
the property is really for.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>

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# 6702488c 31-May-2017 Bin Meng <bmeng.cn@gmail.com>

x86: baytrail: Remove "serial-debug-port-*" settings

"serial-debug-port-address" and "serial-debug-port-type" settings
are actually reserved in the FSP UPD data structure. Remove them.

Signed-off-b

x86: baytrail: Remove "serial-debug-port-*" settings

"serial-debug-port-address" and "serial-debug-port-type" settings
are actually reserved in the FSP UPD data structure. Remove them.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>

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# 632093b5 14-Aug-2015 Tom Rini <trini@konsulko.com>

Merge git://git.denx.de/u-boot-x86


# da60fb79 08-Aug-2015 Bin Meng <bmeng.cn@gmail.com>

x86: fsp: Do not assert VPD_IMAGE_REV when DEBUG

When using different release version of Intel FSP, the VPD_IMAGE_REV
is different (ie: BayTrail Gold 3 is 0x0303 while Gold 4 is 0x0304).
Remove the

x86: fsp: Do not assert VPD_IMAGE_REV when DEBUG

When using different release version of Intel FSP, the VPD_IMAGE_REV
is different (ie: BayTrail Gold 3 is 0x0303 while Gold 4 is 0x0304).
Remove the asserting of this so that U-Boot does not hang in a debug
build.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>

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# 1a2728ae 05-Aug-2015 Tom Rini <trini@konsulko.com>

Merge git://git.denx.de/u-boot-x86


# 3e79a4ab 30-Jul-2015 Bin Meng <bmeng.cn@gmail.com>

x86: baytrail: Update UPD setting for FSP Gold4 release

BayTrail FSP Gold4 release adds one UPD parameter to control IGD
enable/disable.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon

x86: baytrail: Update UPD setting for FSP Gold4 release

BayTrail FSP Gold4 release adds one UPD parameter to control IGD
enable/disable.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>

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# e1cc4d31 24-Feb-2015 Albert ARIBAUD <albert.u.boot@aribaud.net>

Merge remote-tracking branch 'u-boot/master' into 'u-boot-arm/master'


# e72d3443 13-Feb-2015 Stefano Babic <sbabic@denx.de>

Merge branch 'master' of git://git.denx.de/u-boot


# db7a7dee 10-Feb-2015 Tom Rini <trini@ti.com>

Merge branch 'master' of git://git.denx.de/u-boot-x86


# 3a1a18ff 28-Jan-2015 Simon Glass <sjg@chromium.org>

x86: Add support for Intel Minnowboard Max

This is a relatively low-cost x86 board in a small form factor. The main
peripherals are uSD, USB, HDMI, Ethernet and SATA. It uses an Atom 3800
series CPU

x86: Add support for Intel Minnowboard Max

This is a relatively low-cost x86 board in a small form factor. The main
peripherals are uSD, USB, HDMI, Ethernet and SATA. It uses an Atom 3800
series CPU. So far only the dual core 2GB variant is supported.

This uses the existing FSP support. Binary blobs are required to make this
board work. The microcode update is included as a patch (all 3000 lines of
it).

Change-Id: I0088c47fe87cf08ae635b343d32c332269062156
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

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