| 1f4e2578 | 18-Jul-2017 |
Stefan Roese <sr@denx.de> |
x86: dfi-bt700: Add xHCI USB support
Change from EHCI to xHCI on the DFI BayTrail SoM.
The xHCI USB hub is connected to an GPIO on the DFI BayTrail SoM. For
correct operation, it needs to get reset
x86: dfi-bt700: Add xHCI USB support
Change from EHCI to xHCI on the DFI BayTrail SoM.
The xHCI USB hub is connected to an GPIO on the DFI BayTrail SoM. For
correct operation, it needs to get reset upon power-up. Otherwise it
may happen that the hub is not detected after a software reboot. This
patch also configures this GPIO in the dts for correct operation.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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| f8f291b0 | 31-May-2017 |
Bin Meng <bmeng.cn@gmail.com> |
x86: baytrail: Change lpe/lpss-sio/scc FSP properties to integer
At present lpe/lpss-sio/scc FSP properties are all boolean, but in
fact for "enable-lpe" it has 3 possible options. This adds macros
x86: baytrail: Change lpe/lpss-sio/scc FSP properties to integer
At present lpe/lpss-sio/scc FSP properties are all boolean, but in
fact for "enable-lpe" it has 3 possible options. This adds macros
for these options and change the property from a boolean type to
an integer type, and change their names to explicitly indicate what
the property is really for.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
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| c2f17939 | 08-May-2017 |
Bin Meng <bmeng.cn@gmail.com> |
x86: minnowmax: Remove incorrect pad-offset of several pins
Remove 'pad-offset' of soc_gpio_s5_0, soc_gpio_s5_1, soc_gpio_s5_2,
pin_usb_host_en0 and pin_usb_host_en1. These offsets are actually
wron
x86: minnowmax: Remove incorrect pad-offset of several pins
Remove 'pad-offset' of soc_gpio_s5_0, soc_gpio_s5_1, soc_gpio_s5_2,
pin_usb_host_en0 and pin_usb_host_en1. These offsets are actually
wrong. Correct value should be added by 0x2000, but since they
are supposed to be 'mode-gpio', 'pad-offset' is not needed at all.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
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| 399de922 | 18-Jan-2017 |
Bin Meng <bmeng.cn@gmail.com> |
x86: qemu: Mark ucode as optional for SPL in u-boot.dtsi
QEMU does not need ucode and this is indicated in u-boot.dtsi
for U-Boot proper. Now add the same for SPL.
Signed-off-by: Bin Meng <bmeng.cn
x86: qemu: Mark ucode as optional for SPL in u-boot.dtsi
QEMU does not need ucode and this is indicated in u-boot.dtsi
for U-Boot proper. Now add the same for SPL.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
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| 6935dc1b | 16-Jan-2017 |
Simon Glass <sjg@chromium.org> |
x86: link: Set up device tree for SPL
Add the correct pre-relocation tag so that the required device tree nodes
are present in the SPL device tree.
On x86 it doesn't make a lot of sense to have a s
x86: link: Set up device tree for SPL
Add the correct pre-relocation tag so that the required device tree nodes
are present in the SPL device tree.
On x86 it doesn't make a lot of sense to have a separate SPL device tree.
Since everything is in the same ROM we might as well just use the main
device tree in both SPL and U-Boot proper. But we haven't implemented that,
so this is a good first step.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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| 79e550e0 | 26-Dec-2016 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Add file names from Kconfig in CMC/FSP/VGA nodes in u-boot.dtsi
Since we already have a bunch of Kconfig options for CMC/FSP/VGA file
names, add these from Kconfig in the corresponding dts node
x86: Add file names from Kconfig in CMC/FSP/VGA nodes in u-boot.dtsi
Since we already have a bunch of Kconfig options for CMC/FSP/VGA file
names, add these from Kconfig in the corresponding dts nodes.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
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| 27daffe7 | 15-Aug-2016 |
Stefan Roese <sr@denx.de> |
x86: Add theadorable-x86-dfi-bt700 board support
This patch adds support for the BayTrail based theadorable-x86-dfi-bt700
board which uses the DFI BT700 BayTrail Qseven SoM on a custom baseboard.
Th
x86: Add theadorable-x86-dfi-bt700 board support
This patch adds support for the BayTrail based theadorable-x86-dfi-bt700
board which uses the DFI BT700 BayTrail Qseven SoM on a custom baseboard.
The main difference to the DFI baseboard is, that it isn't equipped
with a Super IO chip and uses the internal HS SIO UART (memory mapped
PCI based) as the console UART.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
show more ...
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