| #
07d77838 |
| 01-Aug-2017 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-x86
|
| #
b7c6baef |
| 31-Jul-2017 |
Simon Glass <sjg@chromium.org> |
x86: Convert MMC to driver model
Convert the pci_mmc driver over to driver model and migrate all x86 boards that use it.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.c
x86: Convert MMC to driver model
Convert the pci_mmc driver over to driver model and migrate all x86 boards that use it.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> [bmeng: remove DM_MMC from edison_defconfig] Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
show more ...
|
| #
08546df9 |
| 27-Jun-2017 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-x86
|
| #
da2364cc |
| 26-Jun-2017 |
Bin Meng <bmeng.cn@gmail.com> |
Revert "x86: Convert MMC to driver model"
This reverts commit ddb3ac3c716f56cead695444e65a7ba7b0946555.
With MMC converted to driver model, SCSI driver is broken due to zero address access at (ops-
Revert "x86: Convert MMC to driver model"
This reverts commit ddb3ac3c716f56cead695444e65a7ba7b0946555.
With MMC converted to driver model, SCSI driver is broken due to zero address access at (ops->read) in block_dread() function.
The fix (SCSI driver converted to DM) is ready in u-boot-dm branch, but it is too late for this relese to get that in.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
show more ...
|
| #
ae1b9399 |
| 17-May-2017 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-x86
|
| #
ddb3ac3c |
| 10-Apr-2017 |
Simon Glass <sjg@chromium.org> |
x86: Convert MMC to driver model
Convert the pci_mmc driver over to driver model and migrate all x86 boards that use it.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.c
x86: Convert MMC to driver model
Convert the pci_mmc driver over to driver model and migrate all x86 boards that use it.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
show more ...
|
| #
0ac8b1f4 |
| 20-Jan-2016 |
Simon Glass <sjg@chromium.org> |
dm: x86: queensbay: Add an interrupt driver
Add a driver for interrupts on queensbay and move the code currently in cpu_irq_init() into its probe() method.
Signed-off-by: Simon Glass <sjg@chromium.
dm: x86: queensbay: Add an interrupt driver
Add a driver for interrupts on queensbay and move the code currently in cpu_irq_init() into its probe() method.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
show more ...
|
| #
a2771943 |
| 18-Jul-2015 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Convert to use driver model pci on queensbay/crownbay
Move to driver model pci for Intel queensbay/crownbay.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
|
| #
6f43ba70 |
| 07-Jul-2015 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot/master' into 'u-boot-arm/master'
|
| #
9c7dea60 |
| 25-May-2015 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Refactor PIRQ routing support
PIRQ routing is pretty much common in Intel chipset. It has several PIRQ links (normally 8) and corresponding registers (either in PCI configuration space or memor
x86: Refactor PIRQ routing support
PIRQ routing is pretty much common in Intel chipset. It has several PIRQ links (normally 8) and corresponding registers (either in PCI configuration space or memory-mapped IBASE) to configure the legacy 8259 IRQ vector mapping. Refactor current Queensbay PIRQ routing support using device tree and move it to a common place, so that we can easily add PIRQ routing support on a new platform.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
show more ...
|
| #
afbf1404 |
| 24-Apr-2015 |
Bin Meng <bmeng.cn@gmail.com> |
x86: queensbay: Implement PIRQ routing
Implement Intel Queensbay platform-specific PIRQ routing support. The chipset PIRQ routing setup is called in the arch_misc_init().
Signed-off-by: Bin Meng <b
x86: queensbay: Implement PIRQ routing
Implement Intel Queensbay platform-specific PIRQ routing support. The chipset PIRQ routing setup is called in the arch_misc_init().
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
show more ...
|
| #
e1cc4d31 |
| 24-Feb-2015 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge remote-tracking branch 'u-boot/master' into 'u-boot-arm/master'
|
| #
e72d3443 |
| 13-Feb-2015 |
Stefano Babic <sbabic@denx.de> |
Merge branch 'master' of git://git.denx.de/u-boot
|
| #
db7a7dee |
| 10-Feb-2015 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-x86
|
| #
7b02bf3c |
| 28-Jan-2015 |
Simon Glass <sjg@chromium.org> |
x86: Make CAR and DRAM FSP code common
For now this code seems to be the same for all FSP platforms. Make it common until we see what differences are required.
Signed-off-by: Simon Glass <sjg@chrom
x86: Make CAR and DRAM FSP code common
For now this code seems to be the same for all FSP platforms. Make it common until we see what differences are required.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
show more ...
|
| #
1021af4d |
| 28-Jan-2015 |
Simon Glass <sjg@chromium.org> |
x86: Move common FSP code into a common location
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
|
| #
4e0114d9 |
| 30-Dec-2014 |
Stefano Babic <sbabic@denx.de> |
Merge branch 'master' of git://git.denx.de/u-boot
Signed-off-by: Stefano Babic <sbabic@denx.de>
|
| #
d8046ff0 |
| 19-Dec-2014 |
Tom Rini <trini@ti.com> |
Merge git://git.denx.de/u-boot-x86
|
| #
aada6276 |
| 17-Dec-2014 |
Bin Meng <bmeng.cn@gmail.com> |
x86: crownbay: Add SDHCI support
There are two standard SD card slots on the Crown Bay board, which are connected to the Topcliff PCH SDIO controllers. Enable the SDHC support so that we can use the
x86: crownbay: Add SDHCI support
There are two standard SD card slots on the Crown Bay board, which are connected to the Topcliff PCH SDIO controllers. Enable the SDHC support so that we can use them.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
show more ...
|
| #
b2e02d28 |
| 17-Dec-2014 |
Bin Meng <bmeng.cn@gmail.com> |
x86: Add basic support to queensbay platform and crownbay board
Implement minimum required functions for the basic support to queensbay platform and crownbay board.
Currently the implementation is
x86: Add basic support to queensbay platform and crownbay board
Implement minimum required functions for the basic support to queensbay platform and crownbay board.
Currently the implementation is to call fsp_init() in the car_init(). We may move that call to cpu_init_f() in the future.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
show more ...
|