History log of /rk3399_rockchip-uboot/arch/x86/cpu/ivybridge/bd82x6x.c (Results 1 – 25 of 43)
Revision Date Author Comments
# 05af050e 16-Jan-2017 Simon Glass <sjg@chromium.org>

x86: ivybridge: Declare global data where it is used

Some files are missing this declaration. Add it to avoid build errors when
we actually need the declaration.

Signed-off-by: Simon Glass <sjg@chr

x86: ivybridge: Declare global data where it is used

Some files are missing this declaration. Add it to avoid build errors when
we actually need the declaration.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

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# 5ebd27d8 12-Oct-2016 Tom Rini <trini@konsulko.com>

Merge branch 'master' of git://git.denx.de/u-boot-x86


# b6409ec3 06-Oct-2016 Simon Glass <sjg@chromium.org>

dm: x86: Move link to use driver model for video

Update the configuration to use the new driver. Drop the existing plumbing
code and unused header files.

Signed-off-by: Simon Glass <sjg@chromium.or

dm: x86: Move link to use driver model for video

Update the configuration to use the new driver. Drop the existing plumbing
code and unused header files.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

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# 08ca213a 24-May-2016 Stefano Babic <sbabic@denx.de>

Merge branch 'master' of git://git.denx.de/u-boot


# 4b6e1fda 17-May-2016 Tom Rini <trini@konsulko.com>

Merge git://git.denx.de/u-boot-dm


# a219639d 01-May-2016 Simon Glass <sjg@chromium.org>

dm: Rename disk uclass to ahci

This started as 'ahci' and was renamed to 'disk' during code review. But it
seems that this is too generic. Now that we have a 'blk' uclass, we can use
that as the gen

dm: Rename disk uclass to ahci

This started as 'ahci' and was renamed to 'disk' during code review. But it
seems that this is too generic. Now that we have a 'blk' uclass, we can use
that as the generic piece, and revert to ahci for this.

Signed-off-by: Simon Glass <sjg@chromium.org>

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# 8c30b571 12-Mar-2016 Simon Glass <sjg@chromium.org>

x86: Move common LPC code to its own place

Some of the LPC code is common to several Intel LPC devices. Move it into a
common location.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bi

x86: Move common LPC code to its own place

Some of the LPC code is common to several Intel LPC devices. Move it into a
common location.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

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# bb096b9f 12-Mar-2016 Simon Glass <sjg@chromium.org>

x86: Add the root-complex block to common intel registers

This is similar to MCH in that it is used in various drivers. Add it to
the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>
Re

x86: Add the root-complex block to common intel registers

This is similar to MCH in that it is used in various drivers. Add it to
the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

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# 87077e97 17-Feb-2016 Bin Meng <bmeng.cn@gmail.com>

x86: ivybridge: bd82x6x: Support FSP enabled configuration

Wrap initialization codes with #ifndef CONFIG_HAVE_FSP #endif,
and enable the build for both FSP and non-FSP configurations.

Signed-off-by

x86: ivybridge: bd82x6x: Support FSP enabled configuration

Wrap initialization codes with #ifndef CONFIG_HAVE_FSP #endif,
and enable the build for both FSP and non-FSP configurations.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

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# ec2af6f8 01-Feb-2016 Bin Meng <bmeng.cn@gmail.com>

x86: pch: Implement get_gpio_base op

Implement get_gpio_base op for bd82x6x, pch7 and pch9 drivers.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-b

x86: pch: Implement get_gpio_base op

Implement get_gpio_base op for bd82x6x, pch7 and pch9 drivers.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>

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# 3e389d8b 01-Feb-2016 Bin Meng <bmeng.cn@gmail.com>

dm: pch: Rename get_sbase op to get_spi_base

Spell out 'sbase' to 'spi_base' so that it looks clearer.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Teste

dm: pch: Rename get_sbase op to get_spi_base

Spell out 'sbase' to 'spi_base' so that it looks clearer.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>

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# d02be99e 01-Feb-2016 Bin Meng <bmeng.cn@gmail.com>

dm: pch: Remove pch_get_version op

pch_get_version op was only used by the ich spi controller driver,
and does not really provide a good identification of pch controller
so far, since we see plenty

dm: pch: Remove pch_get_version op

pch_get_version op was only used by the ich spi controller driver,
and does not really provide a good identification of pch controller
so far, since we see plenty of Intel PCH chipsets and one differs
from another a lot, which is not simply either a PCHV_7 or PCHV_9.
Now that ich spi controller driver was updated to not get such info
from pch, the pch_get_version op is useless now.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>

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# 25d5352c 17-Jan-2016 Simon Glass <sjg@chromium.org>

x86: ivybridge: Use syscon for the GMA device

Until we have a proper video uclass we can use syscon to handle the GMA
device, and avoid the special device tree and PCI searching. Update the code
to

x86: ivybridge: Use syscon for the GMA device

Until we have a proper video uclass we can use syscon to handle the GMA
device, and avoid the special device tree and PCI searching. Update the code
to work this way.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

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# 278d3a44 17-Jan-2016 Simon Glass <sjg@chromium.org>

x86: ivybridge: Drop special EHCI init

This is not needed. On reset wake-on-disconnect is already set. It may a
problem during a soft reset or resume, but for now it does not seem
important. Also dr

x86: ivybridge: Drop special EHCI init

This is not needed. On reset wake-on-disconnect is already set. It may a
problem during a soft reset or resume, but for now it does not seem
important. Also drop the command register update since PCI auto-config
does it for us.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

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# a5ea3a7d 17-Jan-2016 Simon Glass <sjg@chromium.org>

x86: ivybridge: Move code from pch.c to bd82x6x.c

This code relates to the PCH, so we should move it into the same file.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.c

x86: ivybridge: Move code from pch.c to bd82x6x.c

This code relates to the PCH, so we should move it into the same file.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

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# 4e190729 17-Jan-2016 Simon Glass <sjg@chromium.org>

x86: ivybridge: Move LPC init into the LPC probe() method

Drop the lpc_init_extra() function and just use the post-relocation LPC
probe() instead.

Signed-off-by: Simon Glass <sjg@chromium.org>
Revi

x86: ivybridge: Move LPC init into the LPC probe() method

Drop the lpc_init_extra() function and just use the post-relocation LPC
probe() instead.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

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# 865c24ee 17-Jan-2016 Simon Glass <sjg@chromium.org>

x86: ivybridge: Move lpc_enable() into gma.c

This graphics init code is best placed in the gma init code. Move the code
and drop the function.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed

x86: ivybridge: Move lpc_enable() into gma.c

This graphics init code is best placed in the gma init code. Move the code
and drop the function.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

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# 01a67908 17-Jan-2016 Simon Glass <sjg@chromium.org>

x86: ivybridge: Use the SATA driver to do the init

Instead of manually initing the device, probe the SATA device and move the
init there.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by:

x86: ivybridge: Use the SATA driver to do the init

Instead of manually initing the device, probe the SATA device and move the
init there.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

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# 82935b75 17-Jan-2016 Simon Glass <sjg@chromium.org>

x86: ivybridge: Drop the unused bd82x6x_init_extra()

This function does nothing now so can be dropped.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# d46f2a68 17-Jan-2016 Simon Glass <sjg@chromium.org>

x86: ivybridge: Do the SATA init before relocation

The SATA device needs to set itself up so that it appears correctly on the
PCI bus. The easiest way to do this is to set it up to probe before
relo

x86: ivybridge: Do the SATA init before relocation

The SATA device needs to set itself up so that it appears correctly on the
PCI bus. The easiest way to do this is to set it up to probe before
relocation. This can do the early setup.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

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# 9ed781a6 17-Jan-2016 Simon Glass <sjg@chromium.org>

x86: ivybridge: Move northbridge and PCH init into drivers

Instead of calling the northbridge and PCH init from bd82x6x_init_extra()
when the PCI bus is probed, call it from the respective drivers.

x86: ivybridge: Move northbridge and PCH init into drivers

Instead of calling the northbridge and PCH init from bd82x6x_init_extra()
when the PCI bus is probed, call it from the respective drivers. Also drop
the Northbridge init as it has no effect. The registers it touches appear to
be read-only.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

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# 9d156b57 17-Jan-2016 Simon Glass <sjg@chromium.org>

x86: ivybridge: Move CPU init code into the driver

Use the CPU driver's probe() method to perform the CPU init. This will happen
automatically when the first CPU is probed.

Signed-off-by: Simon Gla

x86: ivybridge: Move CPU init code into the driver

Use the CPU driver's probe() method to perform the CPU init. This will happen
automatically when the first CPU is probed.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

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# 2b27d205 17-Jan-2016 Simon Glass <sjg@chromium.org>

x86: ivybridge: Rename lpc_init() to lpc_init_extra()

In preparation for adding an init() method to the LPC uclass, rename this
existing function so that it will not conflict.

Signed-off-by: Simon

x86: ivybridge: Rename lpc_init() to lpc_init_extra()

In preparation for adding an init() method to the LPC uclass, rename this
existing function so that it will not conflict.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

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# 858361b1 17-Jan-2016 Simon Glass <sjg@chromium.org>

x86: ivybridge: Rename bd82x6x_init()

Rename the existing bd82x6x_init() to bd82x6x_init_extra(). We will remove
this in a later patch.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bi

x86: ivybridge: Rename bd82x6x_init()

Rename the existing bd82x6x_init() to bd82x6x_init_extra(). We will remove
this in a later patch.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

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# 4acc83d4 17-Jan-2016 Simon Glass <sjg@chromium.org>

x86: ivybridge: Set up the LPC device using driver model

Find the LPC device in arch_cpu_init_dm() as a first step to converting
this code to use driver model. Probing the LPC will probe its parent

x86: ivybridge: Set up the LPC device using driver model

Find the LPC device in arch_cpu_init_dm() as a first step to converting
this code to use driver model. Probing the LPC will probe its parent (the
PCH) automatically, so make sure that probing the PCH does nothing before
relocation.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

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