| 9d64c6bb | 30-Sep-2010 |
Aaron Sierra <asierra@xes-inc.com> |
85xx: Add support for not releasing secondary cores via 'mp_holdoff'
Some OSes require that secondary cores not be initialized when they
are booted (eg VxWorks). By default when U-Boot is compiled
85xx: Add support for not releasing secondary cores via 'mp_holdoff'
Some OSes require that secondary cores not be initialized when they
are booted (eg VxWorks). By default when U-Boot is compiled with the
CONFIG_MP option all secondary cores are brought out of reset and held
in spinloops. Setting the "mp_holdoff" environment variable to 'yes'
or '1' will cause U-Boot to leave secondary cores in their default
state.
Signed-off-by: Aaron Sierra <asierra@xes-inc.com>
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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| ebbe11dd | 28-Sep-2010 |
York Sun <yorksun@freescale.com> |
Add memory test feature for mpc85xx POST.
The memory test is performed after DDR initialization when U-boot stills runs
in flash and cache. On recent mpc85xx platforms, the total memory can be more
Add memory test feature for mpc85xx POST.
The memory test is performed after DDR initialization when U-boot stills runs
in flash and cache. On recent mpc85xx platforms, the total memory can be more
than 2GB. To cover whole memory, it needs be mapped 2GB at a time using a
sliding TLB window. After the testing, DDR is remapped with up to 2GB memory
from the lowest address as normal.
If memory test fails, DDR DIMM SPD and DDR controller registers are dumped for
further debugging.
Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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| c02ce6e5 | 28-Sep-2010 |
York Sun <yorksun@freescale.com> |
Adding more control to physical address mapping
A worker function setup_ddr_tlbs_phys() is introduced to implement more
control on physical address mapping.
Signed-off-by: York Sun <yorksun@freesca
Adding more control to physical address mapping
A worker function setup_ddr_tlbs_phys() is introduced to implement more
control on physical address mapping.
Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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| d1e0b10a | 14-Oct-2010 |
Joakim Tjernlund <Joakim.Tjernlund@transmode.se> |
powerpc: do not fixup NULL ptrs
The fixup routine must not fixup NULL pointers.
Problem can be seen by
char *testfun(void) __attribute__((weak));
char *(*myfun)(void) = testfun;
Then add
printf
powerpc: do not fixup NULL ptrs
The fixup routine must not fixup NULL pointers.
Problem can be seen by
char *testfun(void) __attribute__((weak));
char *(*myfun)(void) = testfun;
Then add
printf("myfun:%p, &myfun:%p\n", myfun, &myfun);
before relocation and after relocation.
myfun should be NULL in both cases but it is not.
Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
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| f1371048 | 17-Sep-2010 |
Ilya Yanok <yanok@emcraft.com> |
mpc83xx: add support for setting PCIE clocks
This patch adds support for setting PCIE clocks in cpu_init.c by
providing CONFIG_SYS_SCCR_PCIEXP{1,2} in configuration.
Signed-off-by: Ilya Yanok <yano
mpc83xx: add support for setting PCIE clocks
This patch adds support for setting PCIE clocks in cpu_init.c by
providing CONFIG_SYS_SCCR_PCIEXP{1,2} in configuration.
Signed-off-by: Ilya Yanok <yanok@emcraft.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
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| ad876fff | 16-Sep-2010 |
Victor Gallardo <vgallardo@apm.com> |
ppc4xx: Disable trace broadcast for 44x non debug mode
By default the trace broadcast is enabled on 44x systems.
To reduce power consumption when instruction tracing is
not needed, disable trace br
ppc4xx: Disable trace broadcast for 44x non debug mode
By default the trace broadcast is enabled on 44x systems.
To reduce power consumption when instruction tracing is
not needed, disable trace broadcast.
Check External Debug Mode (EDM) bit to detect if it should be
disabled or not.
Resetting system via a debugger will set the DBCR0[EDM] bit.
Resetting via u-boot or OS will not.
Signed-off-by: Victor Gallardo <vgallardo@apm.com>
Signed-off-by: Stefan Roese <sr@denx.de>
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