powerpc/85xx: clean up and document the QE/FMAN microcode macros

Several macros are used to identify and locate the microcode binary image
that U-boot needs to upload to the QE or Fman. Both the QE

powerpc/85xx: clean up and document the QE/FMAN microcode macros

Several macros are used to identify and locate the microcode binary image
that U-boot needs to upload to the QE or Fman. Both the QE and the Fman
use the QE Firmware binary format to package their respective microcode data,
which is why the same macros are used for both. A given SOC will only have
a QE or an Fman, so this is safe.

Unfortunately, the current macro definition and usage has inconsistencies.
For example, CONFIG_SYS_FMAN_FW_ADDR was used to define the address of Fman
firmware in NOR flash, but CONFIG_SYS_QE_FW_IN_NAND contains the address
of NAND. There's no way to know by looking at a variable how it's supposed
to be used.

In the future, the code which uploads QE firmware and Fman firmware will
be merged.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

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powerpc/85xx: always implement the work-around for Erratum SATA_A001

On the P1022/P1013, the work-around for erratum SATA_A001 was implemented
only if U-Boot initializes SATA, but SATA is not initia

powerpc/85xx: always implement the work-around for Erratum SATA_A001

On the P1022/P1013, the work-around for erratum SATA_A001 was implemented
only if U-Boot initializes SATA, but SATA is not initialized by default. So
move the work-around to the CPU initialization function, so that it's always
executed on the SOCs that need it.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

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Merge branch 'master' of /home/wd/git/u-boot/custodians

* 'master' of /home/wd/git/u-boot/custodians:
powerpc/85xx: Fix builds of P1020/P2020RDB-PC_36BIT_NAND
arch/powerpc/cpu/mpc8xxx/ddr/ctrl_r

Merge branch 'master' of /home/wd/git/u-boot/custodians

* 'master' of /home/wd/git/u-boot/custodians:
powerpc/85xx: Fix builds of P1020/P2020RDB-PC_36BIT_NAND
arch/powerpc/cpu/mpc8xxx/ddr/ctrl_regs.c: Fix GCC 4.6 build warning
arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c: Fix GCC 4.6 build warning
arch/powerpc/cpu/mpc8xxx/ddr/options.c: Fix GCC 4.6 build warning
drivers/qe/uec.c: Fix GCC 4.6 build warning
drivers/usb/host/ehci-fsl.c: Fix GCC 4.6 build warning
drivers/net/fm/fm.c: Fix GCC 4.6 build warning
board/sbc8560/sbc8560.c: Fix GCC 4.6 build warning
board/sbc8548/sbc8548.c: Fix GCC 4.6 build warning
board/freescale/mpc8569mds/mpc8569mds.c: Fix GCC 4.6 build warning
board/freescale/mpc8568mds/mpc8568mds.c: Fix GCC 4.6 build warning
board/freescale/mpc8548cds/mpc8548cds.c: Fix GCC 4.6 build warning
board/freescale/common/pixis.c: Fix GCC 4.6 build warning
board/freescale/common/cds_pci_ft.c: Fix GCC 4.6 build warning
arch/powerpc/cpu/mpc8xxx/fsl_lbc.c: Fix GCC 4.6 build warning
arch/powerpc/cpu/mpc85xx/tlb.c: Fix GCC 4.6 build warning
arch/powerpc/cpu/mpc85xx/cpu_init.c: Fix GCC 4.6 build warning
phylib: Enable AR8021 phy support
powerpc/85xx: Set max alloc length to 10MB on P1022DS
powerpc/mpc85xx: Set SYSCLK to the required frequency
powerpc/85xx: Fix NAND SPL support
powerpc/85xx: Fix MPC8572DS NAND build
fsl_ifc: Fixed a bug in the erratum handling code for IFC_A003399
powerpc/85xx: Add support for Book-E MMU Arch v2.0
powerpc/85xx: Make inclusion of USB device fixup conditional
powerpc/85xx: Fix warning for USB device-fixup
powerpc/85xx: resize the boot page TLB before relocating CCSR
powerpc/85xx: verify the current address of CCSR before relocating it
powerpc/85xx: add some missing sync instructions in the CCSR relocation code
powerpc/85xx: fix some comments in the CCSR relocation code
powerpc/85xx: fix definition of MAS register macros
powerpc/mpc8548cds: Fix network initialization
powerpc/mpc8548: Add workaround for erratum NMG_eTSEC129
powerpc/QorIQ: fix network frame manager TBI PHY address settings

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Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx

* 'master' of git://git.denx.de/u-boot-mpc85xx:
powerpc/85xx: Fix builds of P1020/P2020RDB-PC_36BIT_NAND
arch/powerpc/cpu/mpc8xxx/ddr/ct

Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx

* 'master' of git://git.denx.de/u-boot-mpc85xx:
powerpc/85xx: Fix builds of P1020/P2020RDB-PC_36BIT_NAND
arch/powerpc/cpu/mpc8xxx/ddr/ctrl_regs.c: Fix GCC 4.6 build warning
arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c: Fix GCC 4.6 build warning
arch/powerpc/cpu/mpc8xxx/ddr/options.c: Fix GCC 4.6 build warning
drivers/qe/uec.c: Fix GCC 4.6 build warning
drivers/usb/host/ehci-fsl.c: Fix GCC 4.6 build warning
drivers/net/fm/fm.c: Fix GCC 4.6 build warning
board/sbc8560/sbc8560.c: Fix GCC 4.6 build warning
board/sbc8548/sbc8548.c: Fix GCC 4.6 build warning
board/freescale/mpc8569mds/mpc8569mds.c: Fix GCC 4.6 build warning
board/freescale/mpc8568mds/mpc8568mds.c: Fix GCC 4.6 build warning
board/freescale/mpc8548cds/mpc8548cds.c: Fix GCC 4.6 build warning
board/freescale/common/pixis.c: Fix GCC 4.6 build warning
board/freescale/common/cds_pci_ft.c: Fix GCC 4.6 build warning
arch/powerpc/cpu/mpc8xxx/fsl_lbc.c: Fix GCC 4.6 build warning
arch/powerpc/cpu/mpc85xx/tlb.c: Fix GCC 4.6 build warning
arch/powerpc/cpu/mpc85xx/cpu_init.c: Fix GCC 4.6 build warning
phylib: Enable AR8021 phy support
powerpc/85xx: Set max alloc length to 10MB on P1022DS
powerpc/mpc85xx: Set SYSCLK to the required frequency
powerpc/85xx: Fix NAND SPL support
powerpc/85xx: Fix MPC8572DS NAND build
fsl_ifc: Fixed a bug in the erratum handling code for IFC_A003399
powerpc/85xx: Add support for Book-E MMU Arch v2.0
powerpc/85xx: Make inclusion of USB device fixup conditional
powerpc/85xx: Fix warning for USB device-fixup
powerpc/85xx: resize the boot page TLB before relocating CCSR
powerpc/85xx: verify the current address of CCSR before relocating it
powerpc/85xx: add some missing sync instructions in the CCSR relocation code
powerpc/85xx: fix some comments in the CCSR relocation code
powerpc/85xx: fix definition of MAS register macros
powerpc/mpc8548cds: Fix network initialization
powerpc/mpc8548: Add workaround for erratum NMG_eTSEC129
powerpc/QorIQ: fix network frame manager TBI PHY address settings

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arch/powerpc/cpu/mpc85xx/cpu_init.c: Fix GCC 4.6 build warning

Fix:

cpu_init.c: In function 'cpu_init_r':
cpu_init.c:320:7: warning: variable 'l2srbar' set but not used [-Wunused-but-set-variable]

arch/powerpc/cpu/mpc85xx/cpu_init.c: Fix GCC 4.6 build warning

Fix:

cpu_init.c: In function 'cpu_init_r':
cpu_init.c:320:7: warning: variable 'l2srbar' set but not used [-Wunused-but-set-variable]

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

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Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx

* 'master' of git://git.denx.de/u-boot-mpc85xx:
powerpc/p3060: Add SoC related support for P3060 platform
powerpc/85xx: Add support for

Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx

* 'master' of git://git.denx.de/u-boot-mpc85xx:
powerpc/p3060: Add SoC related support for P3060 platform
powerpc/85xx: Add support for setting up RAID engine liodns on P5020
powerpc/85xx: Refactor some defines out of corenet_ds.h
fm-eth: Add ability for board code to disable a port
powerpc/mpc8548: Add workaround for erratum NMG_LBC103
powerpc/mpc8548: Add workaround for erratum NMG_DDR120
powerpc/mpc85xxcds: Fix PCI speed
powerpc/mpc8548cds: Fix booting message
powerpc/p4080: Add support for secure boot flow
powerpc/85xx: Add Secure Boot support on P1010RDB for NOR, NAND & SPIFLASH
powerpc/85xx: Add PBL & SECUREBOOT support on P3041/P5020DS boards
powerpc/p2041rdb: remove watch dog related codes
powerpc/p2041rdb: updated description of cpld command
powerpc/p2041rdb: add more ddr frequencies support
powerpc/p2041rdb: set sysclk according to status of physical switch SW1
powerpc/p2041rdb: update cpld reset command according to CPLD 2.0
powerpc/mpc8349emds: Migrate from spd_sdram to unified DDR driver
powerpc/mpc83xx: Migrate from spd_sdram to unified DDR driver
powerpc/mpc8xxx: Add DDR2 to unified DDR driver
powerpc/mpc8xxx: Fix picos_to_mclk() and get_memory_clk_period_ps()
powerpc/mpc8xxx: Add SPD EEPROM address for single controller 2 slots
powerpc/mpc8xxx: Fix DDR code for empty first DIMM slot and enable DQS_en
powerpc/85xx: Refactor P2041RDB to use common p_corenet files
powerpc/85xx: refactor common P-Series CoreNet files for FSL boards
powerpc/85xx: Enable CMD_REGINFO on corenet boards
powerpc/85xx: p2041rdb - Remove unused 'execute' perm in TLB entries
powerpc/85xx: Fix USB protocol definitions for P1020RDB
powerpc/corenet_ds: Use separated speed tables for UDIMM and RDIMM
powerpc/mpc8xxx: Move DDR RCW overriding to common code
powerpc/mpc8xxx: Extend CWL table
powerpc/85xx: Cleanup how SVR_MAJ() is defined on MPC8536
powerpc/85xx: Cleanup extern in corenet_ds board code
powerpc/p2041rdb: Add ethernet support on P2041RDB board
powerpc/85xx: Add networking support to P1023RDS
powerpc/hydra: Add ethernet support on P5020/P3041 DS boards
powerpc/85xx: Add FMan ethernet support to P4080DS
powerpc/85xx: Add support for FMan ethernet in Independent mode
powerpc/mpc8548cds: Cleanup mpc8548cds.c
powerpc/mp: add support for discontiguous cores
powerpc/85xx: corenet_ds - Remove unused 'execute' perm in TLB entries
fdt: Add new fdt_create_phandle helper
fdt: Rename fdt_create_phandle to fdt_set_phandle
powerpc/85xx: Fix compile warnings/errors if CONFIG_SYS_DPAA_FMAN isn't set
fsl_ifc: Add the workaround for erratum IFC A-003399(enabled on P1010)
powerpc/P1010: Add workaround for erratum P1010-A003549 (related to IFC)
fsl_ifc: Add the workaround for erratum IFC-A002769 (enable on P1010)
powerpc/85xx: Expanding the window of CCSRBAR in AS=1 from 4k to 1M
powerpc/85xx: Add NAND/NAND_SPL support to P1010RDB
nand: Freescale Integrated Flash Controller NAND support
powerpc/85xx: Add basic support for P1010RDB
powerpc/85xx: Add support for new P102x/P2020 RDB style boards
powerpc/85xx: relocate CCSR before creating the initial RAM area
powerpc/85xx: introduce and document CONFIG_SYS_CCSRBAR macros
powerpc/85xx: Enable internal USB UTMI PHY on p204x/p3041/p50x0
powerpc/85xx: Add ULPI and UTMI USB Phy support for P1010/P1014

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powerpc/mpc8548: Add workaround for erratum NMG_LBC103

The erratum NMG_LBC103 is LBIU3 in MPC8548 errata document.
Any local bus transaction may fail during LBIU resynchronization
process when the c

powerpc/mpc8548: Add workaround for erratum NMG_LBC103

The erratum NMG_LBC103 is LBIU3 in MPC8548 errata document.
Any local bus transaction may fail during LBIU resynchronization
process when the clock divider [CLKDIV] is changing. Ensure there
is no transaction on the local bus for at least 100 microseconds
after changing clock divider LCRR[CLKDIV].

Refer to the erratum LBIU3 of mpc8548.

Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

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powerpc/p4080: Add support for secure boot flow

Pre u-boot Flow:
1. User loads the u-boot image in flash
2. PBL/Configuration word is used to create LAW for Flash at 0xc0000000
(Please note that

powerpc/p4080: Add support for secure boot flow

Pre u-boot Flow:
1. User loads the u-boot image in flash
2. PBL/Configuration word is used to create LAW for Flash at 0xc0000000
(Please note that ISBC expects all these addresses, images to be
validated, entry point etc within 0 - 3.5G range)
3. ISBC validates the u-boot image, and passes control to u-boot
at 0xcffffffc.

Changes in u-boot:
1. Temporarily map CONFIG_SYS_MONITOR_BASE to the 1M
CONFIG_SYS_PBI_FLASH_WINDOW in AS=1.
(The CONFIG_SYS_PBI_FLASH_WINDOW is the address map for the flash
created by PBL/configuration word within 0 - 3.5G memory range. The
u-boot image at this address has been validated by ISBC code)
2. Remove TLB entries for 0 - 3.5G created by ISBC code
3. Remove the LAW entry for the CONFIG_SYS_PBI_FLASH_WINDOW created by
PBL/configuration word after switch to AS = 1

Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com>
Signed-off-by: Kuldip Giroh <kuldip.giroh@freescale.com>
Acked-by: Wood Scott-B07421 <B07421@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

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powerpc/85xx: Add support for FMan ethernet in Independent mode

The Frame Manager (FMan) on QorIQ SoCs with DPAA (datapath acceleration
architecture) is the ethernet contoller block. Normally it is

powerpc/85xx: Add support for FMan ethernet in Independent mode

The Frame Manager (FMan) on QorIQ SoCs with DPAA (datapath acceleration
architecture) is the ethernet contoller block. Normally it is utilized
via Queue Manager (Qman) and Buffer Manager (Bman). However for boot
usage the FMan supports a mode similar to QE or CPM ethernet collers
called Independent mode.

Additionally the FMan block supports multiple 1g and 10g interfaces as a
single entity in the system rather than each controller being managed
uniquely. This means we have to initialize all of Fman regardless of
the number of interfaces we utilize.

Different SoCs support different combinations of the number of FMan as
well as the number of 1g & 10g interfaces support per Fman.

We add support for the following SoCs:
* P1023 - 1 Fman, 2x1g
* P4080 - 2 Fman, each Fman has 4x1g and 1x10g
* P204x/P3041/P5020 - 1 Fman, 5x1g, 1x10g

Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Dai Haruki <dai.haruki@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Ioana Radulescu <ruxandra.radulescu@freescale.com>
Signed-off-by: Lei Xu <B33228@freescale.com>
Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Shaohui Xie <b21989@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

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Merge branch 'master' of /home/wd/git/u-boot/custodians

* 'master' of /home/wd/git/u-boot/custodians:
powerpc/8xxx: Remove dependency on <usb.h>
powerpc/85xx: enable USB2 gadget mode for corenet

Merge branch 'master' of /home/wd/git/u-boot/custodians

* 'master' of /home/wd/git/u-boot/custodians:
powerpc/8xxx: Remove dependency on <usb.h>
powerpc/85xx: enable USB2 gadget mode for corenet ds board
powerpc/85xx: verify the device tree before booting Linux
MPC8xxx: drop redundant boot messages
powerpc/85xx: Fix build failure for P1023RDS
powerpc/p2041rdb: Enable SATA support
powerpc/85xx: Cleanup handling of PVR detection for e500/e500mc/e5500
powerpc/85xx: Fix up clock_freq property in CAN node of dts
85xx: enable FDT support for STX SSA board
powerpc/85xx: provide 85xx flush_icache for cmd_cache
powerpc/p2041rdb: Enable backside L2 cache support
powerpc/85xx: Handle the lack of L2 cache on P2040/P2040E
powerpc/85xx: Add support for P2041[e] XAUI in SERDES
powerpc/85xx: Rename P2040 id & SERDES to P2041
powerpc/85xx: Adding configuration for DCSRCR to enable 32M access
powerpc/85xx: Fix setting of EPAPR_MAGIC value

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powerpc/85xx: Handle the lack of L2 cache on P2040/P2040E

The P2040/P2040E have no L2 cache. So we utilize the SVR to determine
if we are one of these devices and skip the L2 init code in cpu_init.

powerpc/85xx: Handle the lack of L2 cache on P2040/P2040E

The P2040/P2040E have no L2 cache. So we utilize the SVR to determine
if we are one of these devices and skip the L2 init code in cpu_init.c
and release. For the device tree we skip the updating of the L2 cache
properties but we still update the chain of caches so the CPC/L3 node
can be properly updated.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

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powerpc/85xx: Adding configuration for DCSRCR to enable 32M access

Configuring DCSRCR to define the DCSR space to be 1G instead
of the default 4M. DCSRCR only allows selection of either 4M
or 1G.
Mo

powerpc/85xx: Adding configuration for DCSRCR to enable 32M access

Configuring DCSRCR to define the DCSR space to be 1G instead
of the default 4M. DCSRCR only allows selection of either 4M
or 1G.
Most DCSR registers are within 4M but the Nexus trace buffer
is located at offset 16M within the DCSR.

Configuring the LAW to be 32M to allow access to the Nexus
trace buffer. No TLB modification is required since accessing
the Nexus trace buffer from within u-boot is not required.

Signed-off-by: Stephen George <stephen.george@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

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Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx

powerpc/85xx: Enable Internal USB PHY for p2040, p3041, p5010 and p5020

The P2040, P3041, P5010, and P5020 all have internal USB PHYs that we
need to enable for them to function.

Signed-off-by: Roy

powerpc/85xx: Enable Internal USB PHY for p2040, p3041, p5010 and p5020

The P2040, P3041, P5010, and P5020 all have internal USB PHYs that we
need to enable for them to function.

Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

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Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx

powerpc/85xx: Add PBL boot from SPI flash support on P4080DS

PBL(pre-boot loader): SPI flash used as RCW(Reset Configuration Word) and
PBI(pre-boot initialization) source, CPC(CoreNet Platform Cache

powerpc/85xx: Add PBL boot from SPI flash support on P4080DS

PBL(pre-boot loader): SPI flash used as RCW(Reset Configuration Word) and
PBI(pre-boot initialization) source, CPC(CoreNet Platform Cache) used as
1M SRAM where PBL will copy whole U-BOOT image to, U-boot can boot from
CPC after PBL completes RCW and PBI phases.

Signed-off-by: Chunhe Lan <b25806@freescale.com>
Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com>
Signed-off-by: Shaohui Xie <b21989@freescale.com>
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

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Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx

Conflicts:
drivers/usb/host/ehci-pci.c

Signed-off-by: Wolfgang Denk <wd@denx.de>

powerpc/85xx: load ucode from nand flash before qe_init

In the case the QE's microcode is stored in nand flash, we need to load it from
NAND flash to ddr first then the qe_init can get the ucode cor

powerpc/85xx: load ucode from nand flash before qe_init

In the case the QE's microcode is stored in nand flash, we need to load it from
NAND flash to ddr first then the qe_init can get the ucode correctly.

Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

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powerpc: Add cpu_secondary_init_r to allow for initialization post env setup

We can simplify some cpu/SoC level initialization by moving it to be
after the environment and non-volatile storage is se

powerpc: Add cpu_secondary_init_r to allow for initialization post env setup

We can simplify some cpu/SoC level initialization by moving it to be
after the environment and non-volatile storage is setup as there might
be dependancies on such things in various boot configurations.

For example for FSL SoC's with QE if we boot from NAND we need it setup
to extra the ucode image to initialize the QE. If we always do this
after environment & non-volatile storage is working we can have the code
be the same regardless of NOR, NAND, SPI, MMC boot.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

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Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx

powerpc/85xx: Add the workaround for erratum CPC-A003 (enable on P4080)

CoreNet Platform Cache single-bit data error scrubbing will cause data
corruption. Disable the feature to workaround the issu

powerpc/85xx: Add the workaround for erratum CPC-A003 (enable on P4080)

CoreNet Platform Cache single-bit data error scrubbing will cause data
corruption. Disable the feature to workaround the issue.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

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powerpc/85xx: Add the workaround for erratum CPC-A002 (enable on P4080)

CoreNet Platform Cache single-bit tag error scrubbing will cause tag
corruption. Disable the feature to workaround the issue.

powerpc/85xx: Add the workaround for erratum CPC-A002 (enable on P4080)

CoreNet Platform Cache single-bit tag error scrubbing will cause tag
corruption. Disable the feature to workaround the issue.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

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fsl_esdhc: Add the workaround for erratum ESDHC136 (enable on P4080)

False multi-bit ECC errors will be reported by the eSDHC buffer which
can trigger a reset request.

We disable all ECC error chec

fsl_esdhc: Add the workaround for erratum ESDHC136 (enable on P4080)

False multi-bit ECC errors will be reported by the eSDHC buffer which
can trigger a reset request.

We disable all ECC error checking on SDHC.

Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

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powerpc/8xxx: Refactor SRIO initialization into common code

Moved the SRIO init out of corenet_ds and into common code for
8xxx/QorIQ processors that have SRIO. We mimic what we do with PCIe
contro

powerpc/8xxx: Refactor SRIO initialization into common code

Moved the SRIO init out of corenet_ds and into common code for
8xxx/QorIQ processors that have SRIO. We mimic what we do with PCIe
controllers for SRIO.

We utilize the fact that SRIO is over serdes to determine if its
configured or not and thus can setup the LAWs needed for it dynamically.

We additionally update the device tree (to remove the SRIO nodes) if the
board doesn't have SRIO enabled.

Introduced the following standard defines for board config.h:

CONFIG_SYS_SRIO - Chip has SRIO or not
CONFIG_SRIO1 - Board has SRIO 1 port available
CONFIG_SRIO2 - Board has SRIO 2 port available

(where 'n' is the port #)
CONFIG_SYS_SRIOn_MEM_VIRT - virtual address in u-boot
CONFIG_SYS_SRIOn_MEM_PHYS - physical address (for law setup)
CONFIG_SYS_SRIOn_MEM_SIZE - size of window (for law setup)

[ These mimic what we have for PCI and PCIe controllers ]

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Wolfgang Denk <wd@denx.de>

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powerpc/85xx: Replace CONFIG_SYS_HAS_SERDES with a weak function

Instead of a #define use a null weak function for fsl_serdes_init

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>