| #
91671913 |
| 26-Jan-2011 |
York Sun <yorksun@freescale.com> |
powerpc/mpc85xx: implement workaround for errata DDR111 and DDR134
Workaround for the following errata:
DDR111 - MCKE signal may not function correctly at assertion of HRESET
DDR134 - The automatic
powerpc/mpc85xx: implement workaround for errata DDR111 and DDR134
Workaround for the following errata:
DDR111 - MCKE signal may not function correctly at assertion of HRESET
DDR134 - The automatic CAS-to-Preamble feature of the DDR controller can
calibrate to incorrect values
These two workarounds must be implemented together because they touch
common registers.
Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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| #
eb0aff77 |
| 26-Jan-2011 |
York Sun <yorksun@freescale.com> |
powerpc/85xx: Rename MPC8572 DDR erratum to DDR115
Use unique erratum number instead of platform number.
Enable command that reports errata on MPC8572DS.
Signed-off-by: York Sun <yorksun@freescale.
powerpc/85xx: Rename MPC8572 DDR erratum to DDR115
Use unique erratum number instead of platform number.
Enable command that reports errata on MPC8572DS.
Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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| #
5103a03a |
| 29-Jan-2011 |
Kumar Gala <galak@kernel.crashing.org> |
fsl_esdhc: Add the workaround for erratum ESDHC-A001 (enable on P2020)
Data timeout counter (SYSCTL[DTOCV]) is not reliable for values of 4, 8,
and 12. Program one more than the desired value: 4 ->
fsl_esdhc: Add the workaround for erratum ESDHC-A001 (enable on P2020)
Data timeout counter (SYSCTL[DTOCV]) is not reliable for values of 4, 8,
and 12. Program one more than the desired value: 4 -> 5, 8 -> 9, 12 -> 13.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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| #
5aebe3b0 |
| 25-Jan-2011 |
Wolfgang Denk <wd@denx.de> |
Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx
|
| #
fa8d23c0 |
| 10-Jan-2011 |
York Sun <yorksun@freescale.com> |
mpc85xx: Implement workaround for erratum DDR-A003
Erratum DDR-A003 requires workaround to correctly set RCW10 for registered DIMM.
Also adding polling after enabling DDR controller to ensure comple
mpc85xx: Implement workaround for erratum DDR-A003
Erratum DDR-A003 requires workaround to correctly set RCW10 for registered DIMM.
Also adding polling after enabling DDR controller to ensure completion.
Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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|
| #
e1ccf97c |
| 17-Jan-2011 |
Wolfgang Denk <wd@denx.de> |
Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx
|
| #
f133796d |
| 13-Jan-2011 |
Kumar Gala <galak@kernel.crashing.org> |
powerpc/85xx: Add the workaround for erratum ELBC-A001 (enable on P4080)
Simultaneous FCM and GPCM or UPM operation may erroneously trigger bus
monitor timeout. Set timeout to maximum to avoid.
Ba
powerpc/85xx: Add the workaround for erratum ELBC-A001 (enable on P4080)
Simultaneous FCM and GPCM or UPM operation may erroneously trigger bus
monitor timeout. Set timeout to maximum to avoid.
Based on a patch from Lan Chunhe <b25806@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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| #
868da593 |
| 13-Jan-2011 |
Kumar Gala <galak@kernel.crashing.org> |
powerpc/85xx: Add the workaround for erratum CPC-A003 (enable on P4080)
CoreNet Platform Cache single-bit data error scrubbing will cause data
corruption. Disable the feature to workaround the issu
powerpc/85xx: Add the workaround for erratum CPC-A003 (enable on P4080)
CoreNet Platform Cache single-bit data error scrubbing will cause data
corruption. Disable the feature to workaround the issue.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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|
| #
1d2c2a62 |
| 13-Jan-2011 |
Kumar Gala <galak@kernel.crashing.org> |
powerpc/85xx: Add the workaround for erratum CPC-A002 (enable on P4080)
CoreNet Platform Cache single-bit tag error scrubbing will cause tag
corruption. Disable the feature to workaround the issue.
powerpc/85xx: Add the workaround for erratum CPC-A002 (enable on P4080)
CoreNet Platform Cache single-bit tag error scrubbing will cause tag
corruption. Disable the feature to workaround the issue.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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| #
ae026ffd |
| 07-Jan-2011 |
Roy Zang <tie-fei.zang@freescale.com> |
fsl_esdhc: Add the workaround for erratum ESDHC136 (enable on P4080)
False multi-bit ECC errors will be reported by the eSDHC buffer which
can trigger a reset request.
We disable all ECC error chec
fsl_esdhc: Add the workaround for erratum ESDHC136 (enable on P4080)
False multi-bit ECC errors will be reported by the eSDHC buffer which
can trigger a reset request.
We disable all ECC error checking on SDHC.
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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| #
3b4456ec |
| 07-Jan-2011 |
Roy Zang <tie-fei.zang@freescale.com> |
fsl_esdhc: Add the workaround for erratum ESDHC135 (enable on P4080)
The default value of the SRS, VS18 and VS30 and ADMAS fields in the host
controller capabilities register (HOSTCAPBLT) are incorr
fsl_esdhc: Add the workaround for erratum ESDHC135 (enable on P4080)
The default value of the SRS, VS18 and VS30 and ADMAS fields in the host
controller capabilities register (HOSTCAPBLT) are incorrect. The default
of these bits should be zero instead of one.
Clear these bits out when we read HOSTCAPBLT.
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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|
| #
d621da00 |
| 07-Jan-2011 |
Jerry Huang <Chang-Ming.Huang@freescale.com> |
fsl_esdhc: Add the workaround for erratum ESDHC111 (enable on P4080)
Do not issue a manual asynchronous CMD12. Instead, use a (software)
synchronous CMD12 or AUTOCMD12 to abort data transfer.
Signe
fsl_esdhc: Add the workaround for erratum ESDHC111 (enable on P4080)
Do not issue a manual asynchronous CMD12. Instead, use a (software)
synchronous CMD12 or AUTOCMD12 to abort data transfer.
Signed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com>
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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| #
810c4427 |
| 17-Dec-2010 |
Becky Bruce <beckyb@kernel.crashing.org> |
85xx boards: Rename CONFIG_DDR_DLL to CONFIG_SYS_FSL_ERRATUM_DDR_MSYNC_IN
This config option is for an erratum workaround; rename it to be more
clear. Also, drop it from config files don't need it
85xx boards: Rename CONFIG_DDR_DLL to CONFIG_SYS_FSL_ERRATUM_DDR_MSYNC_IN
This config option is for an erratum workaround; rename it to be more
clear. Also, drop it from config files don't need it and were
undefining it.
Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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|
| #
3df4f46f |
| 07-Aug-2010 |
Wolfgang Denk <wd@denx.de> |
Merge branch 'master' of /home/wd/git/u-boot/master
|
| #
36448c60 |
| 03-Aug-2010 |
Wolfgang Denk <wd@denx.de> |
Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx
|
| #
fd3c9bef |
| 06-May-2010 |
Kumar Gala <galak@kernel.crashing.org> |
powerpc/p4080: Add workaround for erratum CPU22
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
|
| #
61054ffa |
| 13-Jul-2010 |
Kumar Gala <galak@kernel.crashing.org> |
powerpc/p4080: Add workaround for errata SERDES8
Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Emil Medve <Emilian.Medve@Freescale.com>
Signed-off-by: Ed Swarthout <Ed.Swarthout
powerpc/p4080: Add workaround for errata SERDES8
Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Emil Medve <Emilian.Medve@Freescale.com>
Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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|
| #
b6c208ab |
| 16-Jul-2010 |
Wolfgang Denk <wd@denx.de> |
Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx
|
| #
79ee3448 |
| 10-Jun-2010 |
Kumar Gala <galak@kernel.crashing.org> |
powerpc/85xx: Add command to report errata workarounds
Add 'errata' command to report what errata we workaround. Report
workaround for erratum SATA-A001 on P1022/P1013.
Also sorted the CONFIG_CMD_
powerpc/85xx: Add command to report errata workarounds
Add 'errata' command to report what errata we workaround. Report
workaround for erratum SATA-A001 on P1022/P1013.
Also sorted the CONFIG_CMD_* list.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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|