UPSTREAM: printk: collect printk stuff into <linux/printk.h> with loglevel support

When we import code from Linux, with regular re-sync planned, we want
to use printk() and pr_*(). U-Boot does not

UPSTREAM: printk: collect printk stuff into <linux/printk.h> with loglevel support

When we import code from Linux, with regular re-sync planned, we want
to use printk() and pr_*(). U-Boot does not support them in a clean
way. So, people end up with local macros, or compat headers here and
there, then we occasionally see build errors of definition conflicts.

We have include/linux/compat.h, but putting all sorts of unrelated
things into a single header is just a temporal workaround. Hence this
patch, to find the best home for all printk variants. If you want to
use printk() and friends, please include <linux/printk.h>. This header
is self-contained, and pulls in only a few headers.

When I was testing this clean-up, I noticed the image size exceeded
its platform limit on some boards. This is because all pr_*() that
were previously defined as no-op in include/linux/mtd/mtd.h (unless
CONFIG_MTD_DEBUG is set), are now enabled.

To make such boards happy, this commit also implements CONFIG_LOGLEVEL.
The concept is similar to the kernel parameter "loglevel". (Actually,
the Kconfig help message was taken from kernel-paremeter.txt of Linux)
Messages with a loglevel smaller than console loglevel will be printed.

The difference is the loglevel is build-time determined. To save the
image size, lower priority pr_*() are compiled out. I set the default
of CONFIG_LOGLEVEL to 6, i.e. pr_notice and higher priority messages
are compiled in.

I adjusted CONFIG_LOGLEVEL to avoid build error for some boards.

Change-Id: I997d8bbeedd48777be87472df8ed126181fc4b8e
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
[trini: Add in SPL_LOGLEVEL that is the same as LOGLEVEL]
Signed-off-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
(cherry picked from commit b44b30260ffa3dc82f4bb98b022483bb09e95353)

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Merge git://git.denx.de/u-boot-uniphier

- Fix unmet direct dependencies warning
- Remove old sLD3 SoC support
- Update reset data
- Add dr_mode DT property to avoid warning

ARM: uniphier: remove sLD3 SoC support

This SoC is too old. It is difficult to maintain any longer.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

Merge git://git.denx.de/u-boot-uniphier

- fix sparse warnings
- sync DT with Linux
- add new board support (LD11/LD20 global)

ARM: uniphier: fix various sparse warnings

Fix warnings reported by sparse:
- ... was not declared. Should it be static?"
- cast to restricted __be32

While fixing those, the type conflict of cci5

ARM: uniphier: fix various sparse warnings

Fix warnings reported by sparse:
- ... was not declared. Should it be static?"
- cast to restricted __be32

While fixing those, the type conflict of cci500_init() was found.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

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board_f: Drop setup_dram_config() wrapper

By making dram_init_banksize() return an error code we can drop the
wrapper. Adjust this and clean up all implementations.

Signed-off-by: Simon Glass <sjg@

board_f: Drop setup_dram_config() wrapper

By making dram_init_banksize() return an error code we can drop the
wrapper. Adjust this and clean up all implementations.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>

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Merge branch 'master' of git://git.denx.de/u-boot-uniphier

- Fix regressions caused by the previous reworks
- Add pin configuration support
- Re-work SPL code
- Update DRAM and PLL setup cod

Merge branch 'master' of git://git.denx.de/u-boot-uniphier

- Fix regressions caused by the previous reworks
- Add pin configuration support
- Re-work SPL code
- Update DRAM and PLL setup code
- Enable needed configs, disable unneeded configs

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ARM: uniphier: remove DRAM base address from board parameters

The base address of each DRAM channel can be calculated from other
parameters, so does not need hard-coding. What we need is the size
o

ARM: uniphier: remove DRAM base address from board parameters

The base address of each DRAM channel can be calculated from other
parameters, so does not need hard-coding. What we need is the size
of each DRAM channel and DRAM_SPARSE flag to decide the start address
of DRAM channel 1.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

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ARM: uniphier: skip memreserve of unused DRAM bank of LD20

Now the "for" loop here iterates on the detected memory banks.
It must skip unused DRAM banks.

Fixes: c995f3a3c526 ("ARM: uniphier: use gd

ARM: uniphier: skip memreserve of unused DRAM bank of LD20

Now the "for" loop here iterates on the detected memory banks.
It must skip unused DRAM banks.

Fixes: c995f3a3c526 ("ARM: uniphier: use gd->bd->bi_dram for memory reserve on LD20 SoC")
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

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ARM: uniphier: correct spelling of "invalid"

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

ARM: uniphier: skip MEMCONF ch2 parsing if CH2_DISABLE bit is set

If SG_MEMCONF_CH2_DISABLE bit is set, the DRAM channel 2 is unused.
The register settings for the ch2 should be ignored.

Signed-off

ARM: uniphier: skip MEMCONF ch2 parsing if CH2_DISABLE bit is set

If SG_MEMCONF_CH2_DISABLE bit is set, the DRAM channel 2 is unused.
The register settings for the ch2 should be ignored.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

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Merge branch 'master' of git://git.denx.de/u-boot-uniphier

- Fix clk driver
- Optimize DRAM init code for LD20 SoC
- Get DRAM information from more reliable source
- Clean up SoC init code

Merge branch 'master' of git://git.denx.de/u-boot-uniphier

- Fix clk driver
- Optimize DRAM init code for LD20 SoC
- Get DRAM information from more reliable source
- Clean up SoC init code
- Allow to use Image.gz for booting ARM64 Linux
- Tidy up environments to use with ATF
- Clean up I2C drivers

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ARM: uniphier: use gd->bd->bi_dram for memory reserve on LD20 SoC

For LD20 SoC, the last 64 byte of each DRAM bank is used for the
dynamic training of DRAM PHY. The regions must be reserved in DT t

ARM: uniphier: use gd->bd->bi_dram for memory reserve on LD20 SoC

For LD20 SoC, the last 64 byte of each DRAM bank is used for the
dynamic training of DRAM PHY. The regions must be reserved in DT to
prevent the kernel from using them. Now gd->bd->bi_dram reflects
the actual memory banks. Just use it instead of getting access to
the board parameters.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

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ARM: uniphier: detect RAM size by decoding HW register instead of DT

U-Boot needs to set up available memory area(s) in dram_init() and
dram_init_banksize(). It is platform-dependent how to detect

ARM: uniphier: detect RAM size by decoding HW register instead of DT

U-Boot needs to set up available memory area(s) in dram_init() and
dram_init_banksize(). It is platform-dependent how to detect the
memory banks. Currently, UniPhier adopts the memory banks _alleged_
by DT. This is based on the assumption that users bind a correct DT
in their build process.

Come to think of it, the DRAM controller has already been set up
before U-Boot is entered (because U-Boot runs on DRAM). So, the
DRAM controller setup register seems a more reliable source of any
information about DRAM stuff. The DRAM banks are initialized by
preliminary firmware (SPL, ARM Trusted Firmware BL2, or whatever),
so this means the source of the reliability is shifted from Device
Tree to such early-stage firmware. However, if the DRAM controller
is wrongly configured, the system will crash. If your system is
running, the DRAM setup register is very likely to provide the
correct DRAM mapping.

Decode the SG_MEMCONF register to get the available DRAM banks.
The dram_init() and dram_init_banksize() need similar decoding.
It would be nice if dram_init_banksize() could reuse the outcome
of dram_init(), but global variables are unavailable at this stage
because the .bss section is available only after the relocation.
As a result, SG_MEMCONF must be checked twice, but a new helper
uniphier_memconf_decode() will help to avoid code duplication.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

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Merge branch 'master' of git://git.denx.de/u-boot-uniphier

- Allow to disable SPL (mainly for ATF)
- Refactor SoC init code
- Update DRAM settings
- Add PXs3 SoC support (DT, pinctrl driver,

Merge branch 'master' of git://git.denx.de/u-boot-uniphier

- Allow to disable SPL (mainly for ATF)
- Refactor SoC init code
- Update DRAM settings
- Add PXs3 SoC support (DT, pinctrl driver, SoC code)

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ARM: uniphier: simplify SoC ID get function

Currently, uniphier_get_soc_type() converts the SoC ID (this is
read from the revision register) to an enum symbol to use it for SoC
identification. Come

ARM: uniphier: simplify SoC ID get function

Currently, uniphier_get_soc_type() converts the SoC ID (this is
read from the revision register) to an enum symbol to use it for SoC
identification. Come to think of it, there is no need for the
conversion in the first place. Using the SoC ID from the register
as-is a straightforward way.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

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ARM: uniphier: replace <linux/err.h> with <linux/errno.h>

These files only need error number macros. Actually, IS_ERR(),
PTR_ERR(), ERR_PTR(), etc. are not useful for U-Boot. Avoid
unnecessary hea

ARM: uniphier: replace <linux/err.h> with <linux/errno.h>

These files only need error number macros. Actually, IS_ERR(),
PTR_ERR(), ERR_PTR(), etc. are not useful for U-Boot. Avoid
unnecessary header includes.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

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ARM: uniphier: reserve memory for DRAM PHY training on PH1-LD20

The DRAM PHY layer on PH1-LD20 is able to calibrate PHY parameters
periodically. This compensates for the voltage and temperature
dev

ARM: uniphier: reserve memory for DRAM PHY training on PH1-LD20

The DRAM PHY layer on PH1-LD20 is able to calibrate PHY parameters
periodically. This compensates for the voltage and temperature
deviation and improves the PHY parameter adjustment. Instead, it
requires 64 byte scratch memory in each DRAM channel for the dynamic
training. The memory regions must be reserved in DT before jumping
to the kernel.

The scratch area can be anywhere in each DRAM channel, but the DRAM
init code in SPL currently assigns it at the end of each channel.
So, it makes sense to reserve the regions on run-time by U-Boot
instead of statically embedding it in the DT in Linux. Anyway,
a boot-loader should know much more about memory initialization
than the kernel.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

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Merge branch 'master' of git://www.denx.de/git/u-boot-uniphier

ARM: uniphier: avoid unaligned access to DT on 64bit SoC

Because DT properties are 4-byte aligned, the pointer access
*(fdt64_t *) in this code causes unaligned access.

Signed-off-by: Masahiro Yama

ARM: uniphier: avoid unaligned access to DT on 64bit SoC

Because DT properties are 4-byte aligned, the pointer access
*(fdt64_t *) in this code causes unaligned access.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

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ARM: uniphier: adjust dram_init() and dram_init_banksize() for ARM64

Currently, these functions assume #address-cells and #size-cells are
both one. Fix them to support 64bit DTB.

Also, I am fixing

ARM: uniphier: adjust dram_init() and dram_init_banksize() for ARM64

Currently, these functions assume #address-cells and #size-cells are
both one. Fix them to support 64bit DTB.

Also, I am fixing a buffer overrun bug while I am here. The array
size of gd->bd->bd_dram is CONFIG_NR_DRAM_BANKS. The number of
iteration in the loop should be limited by that CONFIG.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

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Merge branch 'master' of git://git.denx.de/u-boot-uniphier

ARM: uniphier: fix warnings reported by aarch64 compiler

The UniPhier SoC family has not supported ARMv8 yet, but these would
cause warnings if they were compiled with a 64bit compiler. Before
addi

ARM: uniphier: fix warnings reported by aarch64 compiler

The UniPhier SoC family has not supported ARMv8 yet, but these would
cause warnings if they were compiled with a 64bit compiler. Before
adding the ARMv8 support really, fix them now.

Because UniPhier SoCs do not support Large Physical Address Extension,
casting "phys_addr_t" into "unsigned long" would carry the address
as is.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

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Merge remote-tracking branch 'u-boot/master'

Merge branch 'master' of git://git.denx.de/u-boot-uniphier