| #
e4adc8ed |
| 01-Sep-2017 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-uniphier
- add {ofnode,dev}_read_resource_byname - provide DT probe hook to Denali NAND driver - update clk/reset driver - update DT - misc cleanups
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| #
a55957b9 |
| 26-Aug-2017 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
ARM: uniphier: move PLLCTRL register macros to each SoC .c file
The new SoC PXs3 changed the address of PLL, but still uses the same PLL name. We can not define SC_*PLLCTRL in the common header. Mo
ARM: uniphier: move PLLCTRL register macros to each SoC .c file
The new SoC PXs3 changed the address of PLL, but still uses the same PLL name. We can not define SC_*PLLCTRL in the common header. Move them to per-SoC .c file. Also, fix some PLL comments.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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| #
546197b9 |
| 26-Aug-2017 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
ARM: uniphier: replace <common.h> with <linux/delay.h> in pll settings
The #include <common.h> was added for mdelay(). Later, the declaration of mdelay was moved to <linux/delay.h> by commit 5bc516
ARM: uniphier: replace <common.h> with <linux/delay.h> in pll settings
The #include <common.h> was added for mdelay(). Later, the declaration of mdelay was moved to <linux/delay.h> by commit 5bc516ed661a ("delay: collect {m, n, u}delay declarations to include/linux/delay.h").
There is no need to include <common.h> now.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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| #
d38de7cb |
| 23-Feb-2017 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-uniphier
- Fix regressions caused by the previous reworks - Add pin configuration support - Re-work SPL code - Update DRAM and PLL setup cod
Merge branch 'master' of git://git.denx.de/u-boot-uniphier
- Fix regressions caused by the previous reworks - Add pin configuration support - Re-work SPL code - Update DRAM and PLL setup code - Enable needed configs, disable unneeded configs
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| #
bc647958 |
| 21-Feb-2017 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
ARM: uniphier: set up charge pump current for MPLL of LD11 SoC
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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| #
3c594d34 |
| 12-Oct-2016 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-uniphier
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| #
6c22742d |
| 08-Oct-2016 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
ARM: uniphier: enable SSC for DPLL (DRAM PLL) on LD11 SoC
For Electro-Magnetic Compatibility test.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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| #
231af7f9 |
| 22-Sep-2016 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-uniphier
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| #
c72f4d4c |
| 21-Sep-2016 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
ARM: uniphier: add PLL init code for LD11 SoC
- Initialize PLLs (SPL initializes only DPLL to save the precious SPL memory footprint) - Adjust CPLL/MPLL to the final tape-out frequency - Set t
ARM: uniphier: add PLL init code for LD11 SoC
- Initialize PLLs (SPL initializes only DPLL to save the precious SPL memory footprint) - Adjust CPLL/MPLL to the final tape-out frequency - Set the Cortex-A53 clock to the maximum frequency since it is running at 500MHz (SPLL/4) on startup
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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