Merge git://git.denx.de/u-boot-uniphier

- Fix unmet direct dependencies warning
- Remove old sLD3 SoC support
- Update reset data
- Add dr_mode DT property to avoid warning

ARM: uniphier: remove sLD3 SoC support

This SoC is too old. It is difficult to maintain any longer.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

Merge git://git.denx.de/u-boot-uniphier

ARM: uniphier: remove SPL support for ARMv8 SoCs

It has been a while since ARM Trusted Firmware supported UniPhier SoC
family. U-Boot SPL was intended as a temporary loader that runs in
secure worl

ARM: uniphier: remove SPL support for ARMv8 SoCs

It has been a while since ARM Trusted Firmware supported UniPhier SoC
family. U-Boot SPL was intended as a temporary loader that runs in
secure world. It is a maintenance headache to support two different
boot mechanisms. Secure firmware is realm of ARM Trusted Firmware
and now U-Boot only serves as a non-secure boot loader for UniPhier
ARMv8 SoCs.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

show more ...

Merge git://git.denx.de/u-boot-uniphier

- Add workaround code to make LD20 SoC boot from ARM Trusted Firmware
- Sync DT with Linux to fix DTC warnings
- Add new SoC support code
- Misc fix, updates

ARM: uniphier: add more init code for PXs3

Add the boot device table and reset deassertion for eMMC.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

Merge branch 'master' of git://git.denx.de/u-boot-uniphier

- Fix regressions caused by the previous reworks
- Add pin configuration support
- Re-work SPL code
- Update DRAM and PLL setup cod

Merge branch 'master' of git://git.denx.de/u-boot-uniphier

- Fix regressions caused by the previous reworks
- Add pin configuration support
- Re-work SPL code
- Update DRAM and PLL setup code
- Enable needed configs, disable unneeded configs

show more ...

ARM: uniphier: deassert RST_n of eMMC device for LD11/LD20

For LD11 and LD20 SoCs, the RST_n pin is asserted by default. If
the EXT_CSD[162], bit[1:0] (RST_n_ENABLE) is fused, the eMMC device
would

ARM: uniphier: deassert RST_n of eMMC device for LD11/LD20

For LD11 and LD20 SoCs, the RST_n pin is asserted by default. If
the EXT_CSD[162], bit[1:0] (RST_n_ENABLE) is fused, the eMMC device
would stay in the reset state until its RST_n pin is deasserted by
software.

Currently, this is cared by an ad-hoc way because the eMMC hardware
reset provider is not supported in U-Boot for now. This code should
be re-written once the "mmc-pwrseq-emmc" binding is supported.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

show more ...

Merge branch 'master' of git://git.denx.de/u-boot-uniphier

- Allow to disable SPL (mainly for ATF)
- Refactor SoC init code
- Update DRAM settings
- Add PXs3 SoC support (DT, pinctrl driver,

Merge branch 'master' of git://git.denx.de/u-boot-uniphier

- Allow to disable SPL (mainly for ATF)
- Refactor SoC init code
- Update DRAM settings
- Add PXs3 SoC support (DT, pinctrl driver, SoC code)

show more ...

ARM: uniphier: add PXs3 SoC support

Initial support for PXs3 SoC.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

Merge branch 'master' of git://git.denx.de/u-boot-uniphier

- Enable eMMC driver for LD11/LD20 SoCs
- Refactoring of SoC init code
- Bug fix of pinctrl driver

ARM: uniphier: refactor spl_init_board()

Merge init-*.c into a single file using a table of callbacks because
the initialization flow is almost common among SoCs.

Signed-off-by: Masahiro Yamada <ya

ARM: uniphier: refactor spl_init_board()

Merge init-*.c into a single file using a table of callbacks because
the initialization flow is almost common among SoCs.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

show more ...

ARM: uniphier: refactor board_init()

The code here is cluttered due to the switch statement. Introduce a
table of callbacks to clean up the initialization code across SoCs.

Signed-off-by: Masahiro

ARM: uniphier: refactor board_init()

The code here is cluttered due to the switch statement. Introduce a
table of callbacks to clean up the initialization code across SoCs.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

show more ...

ARM: uniphier: split out UMC clock enable

The clock enable bits for UMC are more SoC-specific than for
the other hardware blocks. Separate the UMC clocks and the other
clocks for better code reuse

ARM: uniphier: split out UMC clock enable

The clock enable bits for UMC are more SoC-specific than for
the other hardware blocks. Separate the UMC clocks and the other
clocks for better code reuse across SoCs.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

show more ...

Merge branch 'master' of git://git.denx.de/u-boot-uniphier

ARM: uniphier: add PLL init code for LD11 SoC

- Initialize PLLs (SPL initializes only DPLL to save the precious
SPL memory footprint)
- Adjust CPLL/MPLL to the final tape-out frequency
- Set t

ARM: uniphier: add PLL init code for LD11 SoC

- Initialize PLLs (SPL initializes only DPLL to save the precious
SPL memory footprint)
- Adjust CPLL/MPLL to the final tape-out frequency
- Set the Cortex-A53 clock to the maximum frequency since it is
running at 500MHz (SPLL/4) on startup

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

show more ...

Merge branch 'master' of git://git.denx.de/u-boot-uniphier

ARM: uniphier: add PLL init code for LD20 SoC

Initialize the DPLL (PLL for DRAM) in SPL, and others in U-Boot
proper. Split the common code into pll-base-ld20.c for easier
re-use.

Signed-off-by: M

ARM: uniphier: add PLL init code for LD20 SoC

Initialize the DPLL (PLL for DRAM) in SPL, and others in U-Boot
proper. Split the common code into pll-base-ld20.c for easier
re-use.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

show more ...

ARM: uniphier: collect clock/PLL init code into a single directory

Now PLLs for DRAM controller are initialized in SPL, and the others
in U-Boot proper. Setting up all of them in a single directory

ARM: uniphier: collect clock/PLL init code into a single directory

Now PLLs for DRAM controller are initialized in SPL, and the others
in U-Boot proper. Setting up all of them in a single directory will
be helpful when we want to share code between SPL and U-Boot proper.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

show more ...

ARM: uniphier: move PLL init code to U-Boot proper where possible

The PLL for the DRAM interface must be initialized in SPL, but the
others can be delayed until U-Boot proper. Move them from SPL to

ARM: uniphier: move PLL init code to U-Boot proper where possible

The PLL for the DRAM interface must be initialized in SPL, but the
others can be delayed until U-Boot proper. Move them from SPL to
U-Boot proper to save the precious SPL memory footprint.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

show more ...

Merge branch 'master' of git://git.denx.de/u-boot

Signed-off-by: Stefano Babic <sbabic@denx.de>

Merge branch 'master' of git://git.denx.de/u-boot-uniphier

ARM: uniphier: add PH1-LD11 SoC support

This is a low-cost ARMv8 SoC from Socionext Inc.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

Merge branch 'master' of git://www.denx.de/git/u-boot-uniphier

ARM: uniphier: add PH1-LD20 SoC support

This is the first ARMv8 SoC from Socionext Inc.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>