arm: semihosting: fix up compile bugs

There is currently a regression when using newer ARM64 compilers
for semihosting: the way long types are inferred from context
is no longer the same.

The semih

arm: semihosting: fix up compile bugs

There is currently a regression when using newer ARM64 compilers
for semihosting: the way long types are inferred from context
is no longer the same.

The semihosting runtime uses long and size_t, so use this
explicitly in the semihosting code and interface, and voila:
the code now works again.

Tested with aarch64-linux-gnu-gcc: Linaro GCC 4.9-2014.09.

Cc: Darwin Rambo <drambo@broadcom.com>
Cc: AKASHI Takahiro <takahiro.akashi@linaro.org>
Cc: Mark Hambleton <mark.hambleton@arm.com>
Cc: Tom Rini <trini@ti.com>
Acked-by: Steve Rae <srae@broadcom.com>
Suggested-by: Mark Hambleton <mark.hambleton@arm.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

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arm: semihosting: staticize internal functions

The semihosting code exposes internal file handle handling
functions to read(), open(), close() and get the length of
a certain file handle.

However t

arm: semihosting: staticize internal functions

The semihosting code exposes internal file handle handling
functions to read(), open(), close() and get the length of
a certain file handle.

However the code using it is only interested in either
reading and entire named file into memory or getting the
file length of a file referred by name. No file handles
are used.

Thus make the file handle code internal to this file by
removing these functions from the semihosting header file
and staticize them.

This gives us some freedom to rearrange the semihosting
code without affecting the external interface.

Cc: Darwin Rambo <drambo@broadcom.com>
Cc: AKASHI Takahiro <takahiro.akashi@linaro.org>
Cc: Mark Hambleton <mark.hambleton@arm.com>
Cc: Tom Rini <trini@ti.com>
Acked-by: Steve Rae <srae@broadcom.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

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ARM: Implement non-cached memory support

Implement an API that can be used by drivers to allocate memory from a
pool that is mapped uncached. This is useful if drivers would otherwise
need to do ext

ARM: Implement non-cached memory support

Implement an API that can be used by drivers to allocate memory from a
pool that is mapped uncached. This is useful if drivers would otherwise
need to do extensive cache maintenance (or explicitly maintaining the
cache isn't safe).

The API is protected using the new CONFIG_SYS_NONCACHED_MEMORY setting.
Boards can set this to the size to be used for the non-cached area. The
area will typically be right below the malloc() area, but architectures
should take care of aligning the beginning and end of the area to honor
any mapping restrictions. Architectures must also ensure that mappings
established for this area do not overlap with the malloc() area (which
should remain cached for improved performance).

While the API is currently only implemented for ARM v7, it should be
generic enough to allow other architectures to implement it as well.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>

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Merge branch 'master' of git://git.denx.de/u-boot-arm

Merge branch 'master' of git://www.denx.de/git/u-boot-imx

Merge git://git.denx.de/u-boot-dm

Conflicts:
drivers/serial/serial-uclass.c

Signed-off-by: Tom Rini <trini@ti.com>

ARM: bootm: Allow booting in secure mode on hyp capable systems

Older Linux kernels will not properly boot in hyp mode, add support for a
bootm_boot_mode environment variable, which can be set to "s

ARM: bootm: Allow booting in secure mode on hyp capable systems

Older Linux kernels will not properly boot in hyp mode, add support for a
bootm_boot_mode environment variable, which can be set to "sec" or "nonsec"
to force booting in secure or non-secure mode when build with non-sec support.

The default behavior can be selected through CONFIG_ARMV7_BOOT_SEC_DEFAULT,
when this is set booting in secure mode is the default. The default setting
for this Kconfig option is N, preserving the current behavior of booting in
non-secure mode by default when non-secure mode is supported.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Acked-by: Siarhei Siamashka <siarhei.siamashka@gmail.com>

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dm: arm: spl: Allow simple malloc() in SPL

For SPL it is sometimes useful to have a simple malloc() just to permit
driver model to work, in the cases where the full malloc() is not made
available by

dm: arm: spl: Allow simple malloc() in SPL

For SPL it is sometimes useful to have a simple malloc() just to permit
driver model to work, in the cases where the full malloc() is not made
available by the board config.

Signed-off-by: Simon Glass <sjg@chromium.org>

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ARM: remove CONFIG_ARM1136 defines

CONFIG_CPU_ARM1136 was introduced into Kconfig by commit 2e07c249a67e
(kconfig: arm: introduce symbol for ARM CPUs).

This commit removes all the defines of CONFIG

ARM: remove CONFIG_ARM1136 defines

CONFIG_CPU_ARM1136 was introduced into Kconfig by commit 2e07c249a67e
(kconfig: arm: introduce symbol for ARM CPUs).

This commit removes all the defines of CONFIG_ARM1136 and replaces
the only reference in arch/arm/lib/cache.c with CONFIG_CPU_ARM1136.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>

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ARM: remove CONFIG_ARM926EJS defines

CONFIG_CPU_ARM926EJS was introduced into Kconfig by commit 2e07c249a67e
(kconfig: arm: introduce symbol for ARM CPUs).

This commit removes all the defines of CO

ARM: remove CONFIG_ARM926EJS defines

CONFIG_CPU_ARM926EJS was introduced into Kconfig by commit 2e07c249a67e
(kconfig: arm: introduce symbol for ARM CPUs).

This commit removes all the defines of CONFIG_ARM926EJS and replaces
the only reference in arch/arm/lib/cache.c with CONFIG_CPU_ARM926EJS.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>

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imx: fix exception vectors relocation in imx27

Commit 3ff46cc4 fixed exception vectors setting in
the general ARM case, by either copying the exception
and indirect vector tables to normal (0x000000

imx: fix exception vectors relocation in imx27

Commit 3ff46cc4 fixed exception vectors setting in
the general ARM case, by either copying the exception
and indirect vector tables to normal (0x00000000) or
high (0xFFFF0000) vectors address, or setting VBAR to
U-Boot's base if applicable.

i.MX27 SoC is ARM926E-JS, thus has only normal and
high options, but does not provide RAM at 0xFFFF0000
and has only ROM at 0x00000000; it is therefore not
possible to move or change its exception vectors.

Besides, i.MX27 ROM code does provide an indirect
vectors table but at a non-standard address and with
the reset and reserved vectors missing.

Turn the current vector relocation code into a weak
routine called after relocate_code from crt0, and add
strong version for i.MX27.

Series-Cc: Heiko Schocher <hs@denx.de>

Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Tested-by: Stefano Babic <sbabic@denx.de>
Tested-by: Philippe Reynes <tremyfr@gmail.com>
Tested-by: Philippe Reynes <tremyfr@yahoo.fr>

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cosmetic: arm: fix whitespace in arch/arm/lib/relocate.S

Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>

ARM: cache-cp15: Use more accurate types

size_t is the canonical type to represent variables that contain a size.
Use it instead of signed integer. Physical addresses can be larger than
32-bit, so u

ARM: cache-cp15: Use more accurate types

size_t is the canonical type to represent variables that contain a size.
Use it instead of signed integer. Physical addresses can be larger than
32-bit, so use a more appropriate type for them as well. phys_addr_t is
a type that is 32-bit on systems that use 32-bit addresses and 64-bit if
the system is 64-bit or uses a form of physical address extension to use
a larger address space on 32-bit systems. Using these types the same API
can be implemented on a wider range of systems.

Signed-off-by: Thierry Reding <treding@nvidia.com>

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Revert "lib: bootm: add missing include"

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Revert "lib: bootm: add missing include"

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This reverts commit 1e96220a5687efae2aed45ce56e143336c40d0a7.

Remove duplicated vxworks.h header.
The same change was done by
"ARM: prevent compiler warnings from bootm.c"
(sha1: 8d196e52b58d1e50a80c2f5067b201cda521c75c)

Signed-off-by: Michal Simek <michal.simek@xilinx.com>

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Merge branch 'master' of git://git.denx.de/u-boot-arm

arm: interrupt_init: set sp in IRQ/FIQ modes

Before this commit, the stack addresses for IRQ and FIQ modes,
IRQ_STACK_START and FIQ_STACK_START, were computed in interrupt_init but
they were not use

arm: interrupt_init: set sp in IRQ/FIQ modes

Before this commit, the stack addresses for IRQ and FIQ modes,
IRQ_STACK_START and FIQ_STACK_START, were computed in interrupt_init but
they were not used.

This commit sets the stack pointers for IRQ and FIQ modes.

Signed-off-by: Georges Savoundararadj <savoundg@gmail.com>
Acked-by: Albert ARIBAUD <albert.u.boot@aribaud.net>

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arm: relocate the exception vectors

This commit relocates the exception vectors.
As ARM1176 and ARMv7 have the security extensions, it uses VBAR. For
the other ARM processors, it copies the relocat

arm: relocate the exception vectors

This commit relocates the exception vectors.
As ARM1176 and ARMv7 have the security extensions, it uses VBAR. For
the other ARM processors, it copies the relocated exception vectors to
the correct address: 0x00000000 or 0xFFFF0000.

Signed-off-by: Georges Savoundararadj <savoundg@gmail.com>
Acked-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: Tom Warren <twarren@nvidia.com>

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arm: make .vectors section allocatable

A regression was introduced in commit 41623c91. The consequence of that
is the non-relocation of the section .vectors symbols :
_undefined_instruction, _softwa

arm: make .vectors section allocatable

A regression was introduced in commit 41623c91. The consequence of that
is the non-relocation of the section .vectors symbols :
_undefined_instruction, _software_interrupt, _prefetch_abort,
_data_abort, _not_used, _irq and _fiq.

Before commit 41623c91, the exception vectors were in a .text section.
The .text section has the attributes allocatable and executable [1].

In commit 41623c91, a specific section is created, called .vectors, with
the attribute executable only.

What have changed between commit 41623c91^ and 41623c91 is the attribute
of the section which contains the exception vectors.
An allocatable section is "a section [that] occupies memory during
process execution" [1] which is the case of the section .vectors.
Adding the lacking attribute (SHF_ALLOC or "a") for the definition of
the section .vectors fixed the issue.

To summarize, the fix has to mark .vectors as allocatable because the
exception vectors reside in "memory during execution" and they need to
be relocated.

[1] http://man7.org/linux/man-pages/man5/elf.5.html

Signed-off-by: Georges Savoundararadj <savoundg@gmail.com>
Acked-by: Albert ARIBAUD <albert.u.boot@aribaud.net>

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