rockchip dmc: add ddr set rate interface

Change-Id: Ie3f5ac29621f1298a759daf44a1caf68d18b9a46
Signed-off-by: Tang Yun ping <typ@rock-chips.com>

rockchip: smccc: sync sip id definition from kernel

Change-Id: Iefc9baab29abe8ba23ad58e74a24b4b6d9bb85d1
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

driver: ram: rockchip: rk3399: add lpddr4 support

Select rk3399-sdram-lpddr4-100.dtsi to initialize LPDDR4
at 50MHz, it will change clock frequency to 800MHz
after initialization is complete.

Chang

driver: ram: rockchip: rk3399: add lpddr4 support

Select rk3399-sdram-lpddr4-100.dtsi to initialize LPDDR4
at 50MHz, it will change clock frequency to 800MHz
after initialization is complete.

Change-Id: I803ed2c809f17bbea40f379194bce548adc338ea
Signed-off-by: YouMin Chen <cym@rock-chips.com>

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driver: ram: rockchip: rk3399: dram init select common code

Add support dram capacity detect.
Select dram timing file base on dram type and clock frequency,
don't need care dram capacity.Dram capaci

driver: ram: rockchip: rk3399: dram init select common code

Add support dram capacity detect.
Select dram timing file base on dram type and clock frequency,
don't need care dram capacity.Dram capacity will auto detect.

Change-Id: I0554a0ec0c753a159406330aa0baa2daafe7ab93
Signed-off-by: YouMin Chen <cym@rock-chips.com>

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driver: ram: rockchip: px30: dram init select common code

Change-Id: I4f01c354355d61884f84bad160a54db927bb72cf
Signed-off-by: YouMin Chen <cym@rock-chips.com>

driver: ram: rockchip: add common code about dram init

Add commond code about rockchip dram init,include print dram info,
capacity detect,config msch timing,config os_regs and so on.

Change-Id: Ie4

driver: ram: rockchip: add common code about dram init

Add commond code about rockchip dram init,include print dram info,
capacity detect,config msch timing,config os_regs and so on.

Change-Id: Ie4223dac31bde290d19627c96088542fcdd5521d
Signed-off-by: YouMin Chen <cym@rock-chips.com>

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rockchip: rk3399: support rk3399pro uart2 input

RK3399: uart2c; RK3399PRO: uart2a.

Change-Id: Ic750e862c30cfd63de4ad800ebf49133feaefb01
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

clk: rockchip: rk3399: support clk dump

add clk_dump.
add peri clk getting rate.
modify aplll init freq to 816M.

Change-Id: I57a9c2f708c12968909b804f957e80fb0c6d3573
Signed-off-by: Elaine Zhang <zh

clk: rockchip: rk3399: support clk dump

add clk_dump.
add peri clk getting rate.
modify aplll init freq to 816M.

Change-Id: I57a9c2f708c12968909b804f957e80fb0c6d3573
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

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clk: rockchip: rk3328: support crypto clk setting

Change-Id: I9e4d58050b087c3da6649efe4d3115da2ce6dce7
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

clk: rockchip: rk322x: support crypto clk setting

Change-Id: Id92acae9424fd0b200f9b4f33982f753f6123207
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

clk: rockchip: px30: support crypto clk setting

Change-Id: I9971fb2b6a40640d78fb259c72aac32582f8e90d
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

clk: rockchip: rk3308: support crypto clk setting

Change-Id: I58967fe70fbae6630fe0404414daaee6b1498b72
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

rockchip: smccc: add secure region read/write interface

Adding more qoute for APIs.

Change-Id: I976cfe3193c242c439195efd9d774a31af003f3c
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

rockchip dmc: add rockchip dmc code

This dmc code is prepare for ddr test tool to scanning ddr freq,
normal firmware no need to enable it.
Current version only support PX30/RK3326 and RK3328/RK3228H

rockchip dmc: add rockchip dmc code

This dmc code is prepare for ddr test tool to scanning ddr freq,
normal firmware no need to enable it.
Current version only support PX30/RK3326 and RK3328/RK3228H,
CONFIG_ROCKCHIP_DMC=y to enable it

Change-Id: I25360846bb5af74eb82bdc6e64bdaa2d55ab0f64
Signed-off-by: Tang Yun ping <typ@rock-chips.com>

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CRU: rv1108 add emmc clk get and set

Change-Id: I8cbfda46d2f7e84f11dbcca844d00c87559d0aa0
Signed-off-by: vicent.chi <vicent.chi@rock-chips.com>

rockchip: clk: rk3308: Add flag for clk_set_defaults

Change-Id: Ic9009b35e395cfe8c2a8f8d367b75b85294c7354
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>

clk: rockchip: rk1808: set apll default frequency to 1.2GHz

For cpu_vdd default voltage enough to support cpu frequency to 1.2GHz,
so set rk1808 default cpu frequency to 1.2GHz.

Change-Id: Ia8a888e

clk: rockchip: rk1808: set apll default frequency to 1.2GHz

For cpu_vdd default voltage enough to support cpu frequency to 1.2GHz,
so set rk1808 default cpu frequency to 1.2GHz.

Change-Id: Ia8a888ee79ab3ae3868790bcc1851552acf90086
Signed-off-by: Lin Huang <hl@rock-chips.com>

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rockchip: add api to distinguish soc variants

Add api soc_is_xxx for soc variants distinguishing.
Most of them borrowed from linux kernel
include/linux/rockchip/cpu.h.

Change-Id: Ifb932c022ffdf001b

rockchip: add api to distinguish soc variants

Add api soc_is_xxx for soc variants distinguishing.
Most of them borrowed from linux kernel
include/linux/rockchip/cpu.h.

Change-Id: Ifb932c022ffdf001b64979fe2554452f0d480e88
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

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rockchip: support get boot devtype and devnum from atags

- preloader would pass bootdev info;
- avoid going through all the possible bootdev;
- rename devtype_num_envset() to boot_devtype_init();

C

rockchip: support get boot devtype and devnum from atags

- preloader would pass bootdev info;
- avoid going through all the possible bootdev;
- rename devtype_num_envset() to boot_devtype_init();

Change-Id: Ia047c744dc7aca97db97664fc92473e46ba102a9
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

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rockchip: boot0: init gd as null in TINY_TPL

Init gd to NULL in case someone using it.
For example, below patch using gd in debug_uart_init:
064eb49314 serial: ns16550: support using pre-loader seri

rockchip: boot0: init gd as null in TINY_TPL

Init gd to NULL in case someone using it.
For example, below patch using gd in debug_uart_init:
064eb49314 serial: ns16550: support using pre-loader serial

Change-Id: Iee71dc8bc9168a0364598a3b4027807cba522594
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

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clk: rockchip: rk312x: add sfc clk init

Change-Id: I5edf0a4b650a57a48f837fa3e007cfaf6a733f92
Signed-off-by: Dingqiang Lin <jon.lin@rock-chips.com>

rockchip: atags: give a valid range for magic check

Avoid "bad magic" report in case that new atags magic has been
added in preloader but U-Boot not.

Change-Id: Id144bd7ae3245323f792bd5fe5d4e0cdef1

rockchip: atags: give a valid range for magic check

Avoid "bad magic" report in case that new atags magic has been
added in preloader but U-Boot not.

Change-Id: Id144bd7ae3245323f792bd5fe5d4e0cdef15ea22
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

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rockchip: rk3399: add tpl support in Kconfig

Rockchp platform suppose to use TPL(run in SRAM) as dram init and
SPL(run in DDR SDRAM) as pre-loader, so that the SPL would not be
limited by SRAM size.

rockchip: rk3399: add tpl support in Kconfig

Rockchp platform suppose to use TPL(run in SRAM) as dram init and
SPL(run in DDR SDRAM) as pre-loader, so that the SPL would not be
limited by SRAM size.

Change-Id: Ib4115dbf6679fd4649e694d069a6489346112a97
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

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driver: ram: rockchip: fix rockchip_setup_ddr_param

rockchip_setup_ddr_param use to write ddr param to
a known place for trustos.

Change-Id: Ied4636d5e709ed036a45434202d99e916a5f1dcb
Signed-off-by:

driver: ram: rockchip: fix rockchip_setup_ddr_param

rockchip_setup_ddr_param use to write ddr param to
a known place for trustos.

Change-Id: Ied4636d5e709ed036a45434202d99e916a5f1dcb
Signed-off-by: YouMin Chen <cym@rock-chips.com>

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clk: rockchip: rk3288: support aclk_vop freq setting

Change-Id: Ifb595f244608378bff1e6443dfc017418f28ce2a
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>