| e5323225 | 11-Apr-2013 |
Benoît Thébaudeau <benoit.thebaudeau@advansee.com> |
arm: Remove support for unused s3c64xx
Following the removal of the smdk6400 board, the s3c64xx SoC becomes unused, so remove associated code. It will still be possible to restore it later from the
arm: Remove support for unused s3c64xx
Following the removal of the smdk6400 board, the s3c64xx SoC becomes unused, so remove associated code. It will still be possible to restore it later from the Git history if necessary.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
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| 52587f1e | 11-Apr-2013 |
Benoît Thébaudeau <benoit.thebaudeau@advansee.com> |
arm: Remove support for smdk6400
The migration of boards from Makefile to boards.cfg was due for v2012.03, but smdk6400 did not follow, and it does not build, so move it to scrapyard. It will still
arm: Remove support for smdk6400
The migration of boards from Makefile to boards.cfg was due for v2012.03, but smdk6400 did not follow, and it does not build, so move it to scrapyard. It will still be possible to restore it from the Git history before fixing it.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
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| b996a3e9 | 10-Apr-2013 |
Tom Rini <trini@ti.com> |
am335x: Update timings for the beaglebone again
After further testing we can run DDR at 400MHz so update the timings again.
Tested-by: Koen Kooi <koen@dominion.thruhere.net> Signed-off-by: Tom Rini
am335x: Update timings for the beaglebone again
After further testing we can run DDR at 400MHz so update the timings again.
Tested-by: Koen Kooi <koen@dominion.thruhere.net> Signed-off-by: Tom Rini <trini@ti.com>
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| 74f40ea1 | 09-Apr-2013 |
Tom Rini <trini@ti.com> |
am335x/ti814x: Correct MMC_BOOT_DEVICES_START/END
Given that on TI814x we have MMC1/2 swapped, we also need to swap them in MMC_BOOT_DEVICES_START/END
Reported-by: Peter Korsgaard <jacmet@sunsite.d
am335x/ti814x: Correct MMC_BOOT_DEVICES_START/END
Given that on TI814x we have MMC1/2 swapped, we also need to swap them in MMC_BOOT_DEVICES_START/END
Reported-by: Peter Korsgaard <jacmet@sunsite.dk> Signed-off-by: Tom Rini <trini@ti.com>
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| c3d2c24f | 05-Apr-2013 |
Tom Rini <trini@ti.com> |
OMAP3/4/5/AM33xx: Correct logic for checking FAT or RAW MMC
In the case of booting from certain peripherals, such as UART, we must not see what the device descriptor says for RAW or FAT mode because
OMAP3/4/5/AM33xx: Correct logic for checking FAT or RAW MMC
In the case of booting from certain peripherals, such as UART, we must not see what the device descriptor says for RAW or FAT mode because in addition to being nonsensical, it leads to a hang. This is why we have a test currently for the boot mode being within range. The problem however is that on some platforms we get MMC2_2 as the boot mode and not the defined value for MMC2, and in others we get the value for MMC2_2. This is required to fix eMMC booting on omap5_uevm.
Tested on am335x_evm (UART, NAND, SD), omap3_beagle (NAND, SD on classic, SD only on xM rev C5) and omap5_uevm (SD, eMMC).
Signed-off-by: Tom Rini <trini@ti.com>
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| d3d82e9f | 04-Apr-2013 |
Lokesh Vutla <lokeshvutla@ti.com> |
arm: omap4: Fix SDRAM AUTO DETECTION
Commit "8602114 omap: emif: configure emif only when required" breaks SDRAM_AUTO_DETECTION. The issue is dmm_init() depends on emif_sizes[](SDRAM Auto detection)
arm: omap4: Fix SDRAM AUTO DETECTION
Commit "8602114 omap: emif: configure emif only when required" breaks SDRAM_AUTO_DETECTION. The issue is dmm_init() depends on emif_sizes[](SDRAM Auto detection) done in do_sdram_init(). The above commit moves dmm_init() above do_sdram_init() because of which dmm_init() uses uninitialized emif_sizes[]. So instead of using global emif_sizes[], get sdram details locally and calculate emif sizes.
Reported-by: Michael Cashwell <mboards@prograde.net> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
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| 47f58a73 | 03-Apr-2013 |
Hunter, Jon <jon-hunter@ti.com> |
omap2420-h4: Fix booting from NOR flash
The omap2420-h4 board is using a RAM based address as the linker location for code. This is causing several problems when attempting to run the latest u-boot
omap2420-h4: Fix booting from NOR flash
The omap2420-h4 board is using a RAM based address as the linker location for code. This is causing several problems when attempting to run the latest u-boot code base on this board from flash. Update the default linker location for code to be in NOR flash. Please note that OMAP maps the NOR flash to address 0x08000000 by default and so use this as the default address for the NOR flash.
Also remove legacy code that attempts to calculate where in flash the sdata structure, that holds the memory interface configuration data, is located. By changing the default linker location for code to flash this is no longer necessary.
Signed-off-by: Jon Hunter <jon-hunter@ti.com>
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| da634ae3 | 04-Apr-2013 |
Andreas Bießmann <andreas.devel@googlemail.com> |
omap_gpmc: change nandecc command
With uppcoming BCH support on OMAP devices we need to decide between differnt algorithms when switching the ECC engine. Currently we support 1-bit hammign and 8-bi
omap_gpmc: change nandecc command
With uppcoming BCH support on OMAP devices we need to decide between differnt algorithms when switching the ECC engine. Currently we support 1-bit hammign and 8-bit BCH on HW backend.
In order to switch between differnet ECC algorithms we need to change the interface of omap_nand_switch_ecc() also.
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com> Cc: Tom Rini <trini@ti.com> Cc: Thomas Weber <thomas.weber.linux@googlemail.com>
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| c0ed9179 | 02-Apr-2013 |
Andreas Bießmann <andreas.devel@googlemail.com> |
omap3/omap_gpmc.h: add ooblayout for BCH8 as in kernel
This patch adds BCH8 ooblayout for NAND as provided by 0e618ef0a6a33cf7ef96c2c824402088dd8ef48c in linux kernel. This Layout is currently only
omap3/omap_gpmc.h: add ooblayout for BCH8 as in kernel
This patch adds BCH8 ooblayout for NAND as provided by 0e618ef0a6a33cf7ef96c2c824402088dd8ef48c in linux kernel. This Layout is currently only provided for 64 byte OOB.
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com> Cc: Tom Rini <trini@ti.com> Cc: Ilya Yanok <ilya.yanok@cogentembedded.com> Cc: Scott Wood <scottwood@freescale.com> Reviewed-by: Tom Rini <trini@ti.com>
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| 5bf299bc | 02-Apr-2013 |
Andreas Bießmann <andreas.devel@googlemail.com> |
asm/omap_gpmc.h: consolidate common defines
arch/arm/include/asm/arch-am33xx/omap_gpmc.h and arch/arm/include/asm/arch-omap3/omap_gpmc.h are almost the same, consolidate the common parts into a new
asm/omap_gpmc.h: consolidate common defines
arch/arm/include/asm/arch-am33xx/omap_gpmc.h and arch/arm/include/asm/arch-omap3/omap_gpmc.h are almost the same, consolidate the common parts into a new header.
Introduce a new asm/omap_gpmc.h which defines the command part and pulls in the architecture specific one.
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com> Cc: Tom Rini <trini@ti.com> Reviewed-by: Tom Rini <trini@ti.com>
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| 86b128d6 | 02-Apr-2013 |
Andreas Bießmann <andreas.devel@googlemail.com> |
omap3/cpu.h: add BCH support
This patch adds the BCH result registers to register mapping for OMAP3 gpmc.
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com> Cc: Tom Rini <trini@ti.com>
omap3/cpu.h: add BCH support
This patch adds the BCH result registers to register mapping for OMAP3 gpmc.
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com> Cc: Tom Rini <trini@ti.com> Cc: Ilya Yanok <ilya.yanok@cogentembedded.com> Cc: Scott Wood <scottwood@freescale.com> Reviewed-by: Tom Rini <trini@ti.com>
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| fed029f3 | 04-Apr-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master' |
| 4fdebefa | 01-Apr-2013 |
Minkyu Kang <mk7.kang@samsung.com> |
exynos: change indentation of defines in cpu.h
Fix the indentation of some defines by tab.
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> |
| be08abc2 | 04-Apr-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot-imx/master' into 'u-boot-arm/master' |
| 5eaa2156 | 27-Mar-2013 |
Stephen Warren <swarren@wwwdotorg.org> |
ARM: bcm2835: fix get_timer() to return ms
Apparently, CONFIG_SYS_HZ must be 1000. Change this, and fix the timer driver to conform to this.
Have the timer implementation export a custom API get_ti
ARM: bcm2835: fix get_timer() to return ms
Apparently, CONFIG_SYS_HZ must be 1000. Change this, and fix the timer driver to conform to this.
Have the timer implementation export a custom API get_timer_us() for use by the BCM2835 MMC API, which needs us resolution for a HW workaround.
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
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| 12a46a38 | 28-Mar-2013 |
Padmavathi Venna <padma.v@samsung.com> |
Exynos: clock: Add generic api to get the clk freq
Add generic api to get the frequency of the required peripherial. This API gets the source clock frequency and returns the required frequency by di
Exynos: clock: Add generic api to get the clk freq
Add generic api to get the frequency of the required peripherial. This API gets the source clock frequency and returns the required frequency by dividing with first and second dividers based on the requirement.
Test with command "sf probe 1:0; time sf read 40008000 0 1000". Try with different numbers of bytes and see that sane values are obtained Build and boot U-boot with this patch, backlight works properly.
Signed-off-by: Padmavathi Venna <padma.v@samsung.com> Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
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| 394d64e4 | 31-Mar-2013 |
Padmavathi Venna <padma.v@samsung.com> |
Exynos: Add peripherial id for pwm
Add peripherial id for pwm inorder to support generic api to get the clk frequency
Test with command "sf probe 1:0; time sf read 40008000 0 1000". Try with differ
Exynos: Add peripherial id for pwm
Add peripherial id for pwm inorder to support generic api to get the clk frequency
Test with command "sf probe 1:0; time sf read 40008000 0 1000". Try with different numbers of bytes and see that sane values are obtained Build and boot U-boot with this patch, backlight works properly.
Signed-off-by: Padmavathi Venna <padma.v@samsung.com> Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
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| acbb1eb7 | 20-Mar-2013 |
Akshay Saraswat <akshay.s@samsung.com> |
Exynos: Add hardware accelerated SHA256 and SHA1
SHA-256 and SHA-1 accelerated using ACE hardware.
Signed-off-by: ARUN MANKUZHI <arun.m@samsung.com> Signed-off-by: Akshay Saraswat <akshay.s@samsung
Exynos: Add hardware accelerated SHA256 and SHA1
SHA-256 and SHA-1 accelerated using ACE hardware.
Signed-off-by: ARUN MANKUZHI <arun.m@samsung.com> Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org>
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| de63ac27 | 04-Mar-2013 |
R Sricharan <r.sricharan@ti.com> |
ARM: mmu: Set domain permissions to client access
The 'XN' execute never bit is set in the pagetables. This will prevent speculative prefetches to non executable regions. But the domain permissio
ARM: mmu: Set domain permissions to client access
The 'XN' execute never bit is set in the pagetables. This will prevent speculative prefetches to non executable regions. But the domain permissions are set as master in the DACR register. So the pagetable attribute for 'XN' is not effective. Change the permissions to client.
This fixes lot of speculative prefetch aborts seen on OMAP5 secure devices.
Signed-off-by: R Sricharan <r.sricharan@ti.com> Tested-by: Vincent Stehle <v-stehle@ti.com> Cc: Vincent Stehle <v-stehle@ti.com> Cc: Tom Rini <trini@ti.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
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| 96fdbec2 | 04-Mar-2013 |
R Sricharan <r.sricharan@ti.com> |
ARM: mmu: Introduce weak dram_bank_setup function
Introduce a weak version of dram_bank_setup function to allow a platform specific function.
This is used in the subsequent patch to setup dram regi
ARM: mmu: Introduce weak dram_bank_setup function
Introduce a weak version of dram_bank_setup function to allow a platform specific function.
This is used in the subsequent patch to setup dram region without 'XN' attribute in order to enable the region under client permissions.
Signed-off-by: R Sricharan <r.sricharan@ti.com> Cc: Vincent Stehle <v-stehle@ti.com> Cc: Tom Rini <trini@ti.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
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| dfa41387 | 04-Mar-2013 |
Vincent Stehlé <v-stehle@ti.com> |
ARM: cache: declare set_section_dcache
We declare the set_section_dcache function globally in the cache header, for later use by e.g. machine specific code.
Signed-off-by: Vincent Stehlé <v-stehle
ARM: cache: declare set_section_dcache
We declare the set_section_dcache function globally in the cache header, for later use by e.g. machine specific code.
Signed-off-by: Vincent Stehlé <v-stehle <at> ti.com> Cc: Tom Rini <trini <at> ti.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
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| c18222be | 21-Feb-2013 |
Ajay Kumar <ajaykumar.rs@samsung.com> |
video: exynos_dp: Remove callbacks from the driver
Replaced the functionality of callbacks by using a standard set of functions. Instead of implementing and hooking up a callback, put the same code
video: exynos_dp: Remove callbacks from the driver
Replaced the functionality of callbacks by using a standard set of functions. Instead of implementing and hooking up a callback, put the same code in one of the standard set of functions by overriding it.
Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
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| ebd749da | 26-Mar-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot-tegra/master' into 'u-boot-arm/master' |
| 412665b4 | 26-Mar-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master' |
| 2a04a317 | 18-Mar-2013 |
Tom Warren <twarren@nvidia.com> |
Tegra114: Dalmore: Add SDIO3 pad config to pinctrl_config table
SDIO1 (the SD-card slot on Dalmore) needs to have its pads setup before the MMC driver is added.
Signed-off-by: Tom Warren <twarren@n
Tegra114: Dalmore: Add SDIO3 pad config to pinctrl_config table
SDIO1 (the SD-card slot on Dalmore) needs to have its pads setup before the MMC driver is added.
Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com>
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