| f66f2aa2 | 14-Jan-2014 |
Stephen Warren <swarren@wwwdotorg.org> |
ARM: rpi_b: power on SDHCI and USB HW modules
Send RPC commands to the VideoCore to turn on the SDHCI and USB modules.
For SDHCI this isn't needed in practice, since the firmware already
turned on t
ARM: rpi_b: power on SDHCI and USB HW modules
Send RPC commands to the VideoCore to turn on the SDHCI and USB modules.
For SDHCI this isn't needed in practice, since the firmware already
turned on the power in order to load U-Boot. However, it's best to be
explicit. For USB, this is necessary, since the module isn't powered
otherwise. This will allow the kernel USB driver to work.
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
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|
| 4641c211 | 20-Jan-2014 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://www.denx.de/git/u-boot-imx |
| be2a3bb3 | 16-Jan-2014 |
Fabio Estevam <fabio.estevam@freescale.com> |
mx6: Revert "mx6: soc: Disable VDDPU regulator"
Commit 022298278 (mx6: soc: Disable VDDPU regulator) is causing kernel hang
for people using FSL kernel 3.0.35 and 3.10, so revert it for now.
Report
mx6: Revert "mx6: soc: Disable VDDPU regulator"
Commit 022298278 (mx6: soc: Disable VDDPU regulator) is causing kernel hang
for people using FSL kernel 3.0.35 and 3.10, so revert it for now.
Reported-by: Otavio Salvador <otavio@ossystems.com.br>
Reported-by: Pierre Aubert <p.aubert@staubli.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
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|
| 4913fc23 | 16-Jan-2014 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-arm |
| 82852762 | 08-Jan-2014 |
Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> |
arm: rmobile: Add SH QSPI base register address
This adds base register address of SH QSPI.
Currently, SH QSPI is used only from R8A7790 and R8A7791.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwam
arm: rmobile: Add SH QSPI base register address
This adds base register address of SH QSPI.
Currently, SH QSPI is used only from R8A7790 and R8A7791.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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|
| bf46e7d8 | 15-Jan-2014 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot-imx/master' into 'u-boot-arm/master' |
| 3a217731 | 03-Jan-2014 |
Fabio Estevam <fabio.estevam@freescale.com> |
mx6: Add initial support for the Hummingboard solo
SolidRun has designed the Hummingboard board based on mx6q/dl/solo.
Add the initial support for the mx6 solo variant.
More information about this
mx6: Add initial support for the Hummingboard solo
SolidRun has designed the Hummingboard board based on mx6q/dl/solo.
Add the initial support for the mx6 solo variant.
More information about this hardware can be found at:
http://imx.solid-run.com/wiki/index.php?title=Carrier-One_Hardware
(Carrier-One was the previous name of Hummingboard).
Based on the work from Jon Nettleton <jon.nettleton@gmail.com>.
Signed-off-by: Jon Nettleton <jon.nettleton@gmail.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
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| 5f98d0b5 | 03-Jan-2014 |
Fabio Estevam <fabio.estevam@freescale.com> |
mx6: clock: Pass the frequency as argument of enable_fec_anatop_clock()
Provide an argument to enable_fec_anatop_clock() to specify the clock frequency
that will be generated.
No changes are made t
mx6: clock: Pass the frequency as argument of enable_fec_anatop_clock()
Provide an argument to enable_fec_anatop_clock() to specify the clock frequency
that will be generated.
No changes are made to mx6slevk, which uses the default 50MHz fec clock.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>
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|
| 16f9480d | 08-Jan-2014 |
Inderpal Singh <chander.kashyap@linaro.org> |
usb: ehci: exynos: set/reset hsic phys
The controller has 3 ports. The port0 is for USB 2.0 Phy, port1 and port2
are for HSIC phys. The usb 2.0 phy is already being setup. This patch
sets up the hsi
usb: ehci: exynos: set/reset hsic phys
The controller has 3 ports. The port0 is for USB 2.0 Phy, port1 and port2
are for HSIC phys. The usb 2.0 phy is already being setup. This patch
sets up the hsic phys.
Signed-off-by: Inderpal Singh <inderpal.singh@linaro.org>
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| 7f673c99 | 10-Jan-2014 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-arm
Bringing in the MMC tree means that CONFIG_BOUNCE_BUFFER needed to be
added to include/configs/exynos5-dt.h now.
Conflicts:
include/configs/ex
Merge branch 'master' of git://git.denx.de/u-boot-arm
Bringing in the MMC tree means that CONFIG_BOUNCE_BUFFER needed to be
added to include/configs/exynos5-dt.h now.
Conflicts:
include/configs/exynos5250-dt.h
Signed-off-by: Tom Rini <trini@ti.com>
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|
| 84515165 | 08-Jan-2014 |
Jagannadha Sutradharudu Teki <jagannadha.sutradharudu-teki@xilinx.com> |
gpio: zynq: Add dummy gpio routines
GPIO dummy routines are required for fdt build, may be removed
these dependencies once the u-boot fdt is fully optimized.
Signed-off-by: Jagannadha Sutradharudu
gpio: zynq: Add dummy gpio routines
GPIO dummy routines are required for fdt build, may be removed
these dependencies once the u-boot fdt is fully optimized.
Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
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|
| b3de9249 | 08-Jan-2014 |
Jagannadha Sutradharudu Teki <jagannadha.sutradharudu-teki@xilinx.com> |
zynq: Add support to find bootmode
Added support to find the bootmodes by reading
slcr bootmode register. this can be helpful to
autoboot the configurations w.r.t a specified bootmode.
Added this f
zynq: Add support to find bootmode
Added support to find the bootmodes by reading
slcr bootmode register. this can be helpful to
autoboot the configurations w.r.t a specified bootmode.
Added this functionality on board_late_init as it's not
needed for normal initializtion part.
Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
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|
| 795611e6 | 09-Jan-2014 |
Tom Rini <trini@ti.com> |
armv8: Use __aarch64__ rather than CONFIG_ARM64 in some cases
The toolchain sets __aarch64__ for both LE and BE. In the case of
posix_types.h we cannot reliably use config.h as that will lead to
pr
armv8: Use __aarch64__ rather than CONFIG_ARM64 in some cases
The toolchain sets __aarch64__ for both LE and BE. In the case of
posix_types.h we cannot reliably use config.h as that will lead to
problems. In the case of byteorder.h it's clearer to check the EB flag
being set in either case instead.
Cc: David Feng <fenghua@phytium.com.cn>
Signed-off-by: Tom Rini <trini@ti.com>
Amended by Albert ARIBAUD <albert.u.boot@aribaud.net> to
actually remove the config.h include from the posix_types.h
files, with permission from Tom Rini.
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|
| 0ae76531 | 14-Dec-2013 |
David Feng <fenghua@phytium.com.cn> |
arm64: core support
Relocation code based on a patch by Scott Wood, which is:
Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: David Feng <fenghua@phytium.com.cn> |
| c5c1af21 | 31-Dec-2013 |
Chin Liang See <clsee@altera.com> |
socfpga/dwmmc: Adding DesignWare MMC driver support for SOCFPGA
To add the DesignWare MMC driver support for Altera SOCFPGA. It
required information such as clocks and bus width from platform
specif
socfpga/dwmmc: Adding DesignWare MMC driver support for SOCFPGA
To add the DesignWare MMC driver support for Altera SOCFPGA. It
required information such as clocks and bus width from platform
specific files (SOCFPGA handoff files)
Signed-off-by: Chin Liang See <clsee@altera.com>
Cc: Rajeshwari Shinde <rajeshwari.s@samsung.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
Cc: Wolfgang Denk <wd@denx.de>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
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|
| 4b0561d8 | 06-Jan-2014 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master' |
| a891601c | 06-Jan-2014 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'
Conflicts:
include/micrel.h
The conflict above was trivial, caused by four lines being
added in both branches with different whitepace. |
| 4611d5ba | 17-Dec-2013 |
Sergey Alyoshin <alyoshin.s@gmail.com> |
arm: mx5: Add fuse supply enable in fsl_iim
Enable fuse supply before fuse programming and disable after.
Signed-off-by: Sergey Alyoshin <alyoshin.s@gmail.com>
Reviewed-by: Benoît Thébaudeau <benoi
arm: mx5: Add fuse supply enable in fsl_iim
Enable fuse supply before fuse programming and disable after.
Signed-off-by: Sergey Alyoshin <alyoshin.s@gmail.com>
Reviewed-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
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|
| 7773fd19 | 16-Dec-2013 |
Otavio Salvador <otavio@ossystems.com.br> |
imx: Easy enabling of SION per-pin using MUX_MODE_SION helper macro
The macro allows easy setting in per-pin, as for example:
,----
| imx_iomux_v3_setup_pad(MX6_PAD_NANDF_D1__GPIO_2_1 | MUX_MODE_SI
imx: Easy enabling of SION per-pin using MUX_MODE_SION helper macro
The macro allows easy setting in per-pin, as for example:
,----
| imx_iomux_v3_setup_pad(MX6_PAD_NANDF_D1__GPIO_2_1 | MUX_MODE_SION);
`----
The IOMUX_CONFIG_SION allows for reading PAD value from PSR register.
The following quote from the datasheet:
,----
| ...
| 28.4.2.2 GPIO Write Mode
| The programming sequence for driving output signals should be as follows:
| 1. Configure IOMUX to select GPIO mode (Via IOMUXC), also enable SION if need
| to read loopback pad value through PSR
| 2. Configure GPIO direction register to output (GPIO_GDIR[GDIR] set to 1b).
| 3. Write value to data register (GPIO_DR).
| ...
`----
This fixes the gpio_get_value to properly work when a GPIO is set for
output and has no conflicts.
Thanks for Benoît Thébaudeau <benoit.thebaudeau@advansee.com>, Fabio
Estevam <fabio.estevam@freescale.com> and Eric Bénard
<eric@eukrea.com> for helping to properly trace this down.
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Acked-by: Stefano Babic <sbabic@denx.de>
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|
| 02229827 | 26-Dec-2013 |
Fabio Estevam <fabio.estevam@freescale.com> |
mx6: soc: Disable VDDPU regulator
As U-boot does not use GPU/VPU peripherals, shutdown the VDDPU regulator
in order to save power.
Signed-off-by: Anson Huang <b20788@freescale.com>
Signed-off-by: J
mx6: soc: Disable VDDPU regulator
As U-boot does not use GPU/VPU peripherals, shutdown the VDDPU regulator
in order to save power.
Signed-off-by: Anson Huang <b20788@freescale.com>
Signed-off-by: Jason Liu <r64343@freescale.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
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|
| fc740648 | 26-Dec-2013 |
Fabio Estevam <fabio.estevam@freescale.com> |
mx6: soc: Staticize set_vddsoc()
set_vddsoc() is not used anywhere else, so make it static.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> |
| 5af4a4f7 | 26-Dec-2013 |
Rajeshwari Birje <rajeshwari.s@samsung.com> |
Exynos5420: Add support for 5420 in pinmux and gpio
Adds code in pinmux and gpio framework to support Exynos5420.
Signed-off-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com>
Signed-off-by: Aksh
Exynos5420: Add support for 5420 in pinmux and gpio
Adds code in pinmux and gpio framework to support Exynos5420.
Signed-off-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com>
Signed-off-by: Akshay Saraswat <akshay.s@samsung.com>
Signed-off-by: Rajeshwari S Shinde <rajeshwari.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
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|
| f3d7c2fe | 26-Dec-2013 |
Rajeshwari Birje <rajeshwari.s@samsung.com> |
Exynos5420: Add DDR3 initialization for 5420
This patch intends to add DDR3 initialization code for Exynos5420.
Signed-off-by: Akshay Saraswat <akshay.s@samsung.com>
Signed-off-by: Rajeshwari S Shi
Exynos5420: Add DDR3 initialization for 5420
This patch intends to add DDR3 initialization code for Exynos5420.
Signed-off-by: Akshay Saraswat <akshay.s@samsung.com>
Signed-off-by: Rajeshwari S Shinde <rajeshwari.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
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|
| 060c227a | 26-Dec-2013 |
Rajeshwari Birje <rajeshwari.s@samsung.com> |
Exynos5420: Add clock initialization for 5420
This patch adds code for clock initialization and clock settings
of various IP's and controllers, required for Exynos5420
Signed-off-by: Rajeshwari S S
Exynos5420: Add clock initialization for 5420
This patch adds code for clock initialization and clock settings
of various IP's and controllers, required for Exynos5420
Signed-off-by: Rajeshwari S Shinde <rajeshwari.s@samsung.com>
Signed-off-by: Akshay Saraswat <akshay.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
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|
| e89278c9 | 26-Dec-2013 |
Rajeshwari Birje <rajeshwari.s@samsung.com> |
EXYNOS5420: Add dmc and phy_control register structure
Add dmc and phy_control register structure for 5420.
Signed-off-by: Rajeshwari S Shinde <rajeshwari.s@samsung.com>
Acked-by: Simon Glass <sjg@
EXYNOS5420: Add dmc and phy_control register structure
Add dmc and phy_control register structure for 5420.
Signed-off-by: Rajeshwari S Shinde <rajeshwari.s@samsung.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
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|