xref: /rk3399_rockchip-uboot/include/configs/zynq-common.h (revision b3de92495f23db58a2643fb9328edacbf9a17f1c)
1 /*
2  * (C) Copyright 2012 Michal Simek <monstr@monstr.eu>
3  * (C) Copyright 2013 Xilinx, Inc.
4  *
5  * Common configuration options for all Zynq boards.
6  *
7  * SPDX-License-Identifier:	GPL-2.0+
8  */
9 
10 #ifndef __CONFIG_ZYNQ_COMMON_H
11 #define __CONFIG_ZYNQ_COMMON_H
12 
13 /* High Level configuration Options */
14 #define CONFIG_ARMV7
15 #define CONFIG_ZYNQ
16 
17 /* CPU clock */
18 #ifndef CONFIG_CPU_FREQ_HZ
19 # define CONFIG_CPU_FREQ_HZ	800000000
20 #endif
21 
22 /* Cache options */
23 #define CONFIG_CMD_CACHE
24 #define CONFIG_SYS_CACHELINE_SIZE	32
25 
26 #define CONFIG_SYS_L2CACHE_OFF
27 #ifndef CONFIG_SYS_L2CACHE_OFF
28 # define CONFIG_SYS_L2_PL310
29 # define CONFIG_SYS_PL310_BASE		0xf8f02000
30 #endif
31 
32 /* Serial drivers */
33 #define CONFIG_BAUDRATE		115200
34 /* The following table includes the supported baudrates */
35 #define CONFIG_SYS_BAUDRATE_TABLE  \
36 	{300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400}
37 
38 /* Zynq Serial driver */
39 #ifdef CONFIG_ZYNQ_SERIAL_UART0
40 # define CONFIG_ZYNQ_SERIAL_BASEADDR0	0xE0000000
41 # define CONFIG_ZYNQ_SERIAL_BAUDRATE0	CONFIG_BAUDRATE
42 # define CONFIG_ZYNQ_SERIAL_CLOCK0	50000000
43 #endif
44 
45 #ifdef CONFIG_ZYNQ_SERIAL_UART1
46 # define CONFIG_ZYNQ_SERIAL_BASEADDR1	0xE0001000
47 # define CONFIG_ZYNQ_SERIAL_BAUDRATE1	CONFIG_BAUDRATE
48 # define CONFIG_ZYNQ_SERIAL_CLOCK1	50000000
49 #endif
50 
51 #if defined(CONFIG_ZYNQ_SERIAL_UART0) || defined(CONFIG_ZYNQ_SERIAL_UART1)
52 # define CONFIG_ZYNQ_SERIAL
53 #endif
54 
55 /* DCC driver */
56 #if defined(CONFIG_ZYNQ_DCC)
57 # define CONFIG_ARM_DCC
58 # define CONFIG_CPU_V6 /* Required by CONFIG_ARM_DCC */
59 #endif
60 
61 /* Ethernet driver */
62 #if defined(CONFIG_ZYNQ_GEM0) || defined(CONFIG_ZYNQ_GEM1)
63 # define CONFIG_NET_MULTI
64 # define CONFIG_ZYNQ_GEM
65 # define CONFIG_MII
66 # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
67 # define CONFIG_PHYLIB
68 # define CONFIG_PHY_MARVELL
69 #endif
70 
71 /* SPI */
72 #ifdef CONFIG_ZYNQ_SPI
73 # define CONFIG_SPI_FLASH
74 # define CONFIG_SPI_FLASH_SST
75 # define CONFIG_CMD_SF
76 #endif
77 
78 /* NOR */
79 #ifndef CONFIG_SYS_NO_FLASH
80 # define CONFIG_SYS_FLASH_BASE		0xE2000000
81 # define CONFIG_SYS_FLASH_SIZE		(16 * 1024 * 1024)
82 # define CONFIG_SYS_MAX_FLASH_BANKS	1
83 # define CONFIG_SYS_MAX_FLASH_SECT	512
84 # define CONFIG_SYS_FLASH_ERASE_TOUT	1000
85 # define CONFIG_SYS_FLASH_WRITE_TOUT	5000
86 # define CONFIG_FLASH_SHOW_PROGRESS	10
87 # define CONFIG_SYS_FLASH_CFI
88 # undef CONFIG_SYS_FLASH_EMPTY_INFO
89 # define CONFIG_FLASH_CFI_DRIVER
90 # undef CONFIG_SYS_FLASH_PROTECTION
91 # define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
92 #endif
93 
94 /* MMC */
95 #if defined(CONFIG_ZYNQ_SDHCI0) || defined(CONFIG_ZYNQ_SDHCI1)
96 # define CONFIG_MMC
97 # define CONFIG_GENERIC_MMC
98 # define CONFIG_SDHCI
99 # define CONFIG_ZYNQ_SDHCI
100 # define CONFIG_CMD_MMC
101 # define CONFIG_CMD_FAT
102 # define CONFIG_SUPPORT_VFAT
103 # define CONFIG_CMD_EXT2
104 # define CONFIG_DOS_PARTITION
105 #endif
106 
107 /* I2C */
108 #if defined(CONFIG_ZYNQ_I2C0) || defined(CONFIG_ZYNQ_I2C1)
109 # define CONFIG_CMD_I2C
110 # define CONFIG_SYS_I2C
111 # define CONFIG_SYS_I2C_ZYNQ
112 # define CONFIG_SYS_I2C_ZYNQ_SPEED		100000
113 # define CONFIG_SYS_I2C_ZYNQ_SLAVE		1
114 #endif
115 
116 /* EEPROM */
117 #ifdef CONFIG_ZYNQ_EEPROM
118 # define CONFIG_CMD_EEPROM
119 # define CONFIG_SYS_I2C_EEPROM_ADDR_LEN		1
120 # define CONFIG_SYS_I2C_EEPROM_ADDR		0x54
121 # define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	4
122 # define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	5
123 # define CONFIG_SYS_EEPROM_SIZE			1024 /* Bytes */
124 #endif
125 
126 #define CONFIG_BOOTP_SERVERIP
127 #define CONFIG_BOOTP_BOOTPATH
128 #define CONFIG_BOOTP_GATEWAY
129 #define CONFIG_BOOTP_HOSTNAME
130 #define CONFIG_BOOTP_MAY_FAIL
131 
132 /* Environment */
133 #define CONFIG_ENV_SIZE		0x10000 /* Env. sector size */
134 #define CONFIG_ENV_IS_NOWHERE
135 #define CONFIG_SYS_LOAD_ADDR	0
136 
137 /* Miscellaneous configurable options */
138 #define CONFIG_SYS_PROMPT		"zynq-uboot> "
139 #define CONFIG_SYS_HUSH_PARSER
140 
141 #define CONFIG_CMDLINE_EDITING
142 #define CONFIG_AUTO_COMPLETE
143 #define CONFIG_BOARD_LATE_INIT
144 #define CONFIG_SYS_LONGHELP
145 #define CONFIG_SYS_MAXARGS		15 /* max number of command args */
146 #define CONFIG_SYS_CBSIZE		256 /* Console I/O Buffer Size */
147 #define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + \
148 					sizeof(CONFIG_SYS_PROMPT) + 16)
149 
150 /* Physical Memory map */
151 #define CONFIG_SYS_TEXT_BASE		0x4000000
152 
153 #define CONFIG_NR_DRAM_BANKS		1
154 #define CONFIG_SYS_SDRAM_BASE		0
155 
156 #define CONFIG_SYS_MEMTEST_START	CONFIG_SYS_SDRAM_BASE
157 #define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_SDRAM_BASE + 0x1000)
158 
159 #define CONFIG_SYS_MALLOC_LEN		0x400000
160 #define CONFIG_SYS_INIT_RAM_ADDR	CONFIG_SYS_SDRAM_BASE
161 #define CONFIG_SYS_INIT_RAM_SIZE	CONFIG_SYS_MALLOC_LEN
162 #define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_INIT_RAM_ADDR + \
163 					CONFIG_SYS_INIT_RAM_SIZE - \
164 					GENERATED_GBL_DATA_SIZE)
165 
166 /* Enable the PL to be downloaded */
167 #define CONFIG_FPGA
168 #define CONFIG_FPGA_XILINX
169 #define CONFIG_FPGA_ZYNQPL
170 #define CONFIG_CMD_FPGA
171 
172 /* Open Firmware flat tree */
173 #define CONFIG_OF_LIBFDT
174 
175 /* FIT support */
176 #define CONFIG_FIT
177 #define CONFIG_FIT_VERBOSE	1 /* enable fit_format_{error,warning}() */
178 
179 /* Boot FreeBSD/vxWorks from an ELF image */
180 #if defined(CONFIG_ZYNQ_BOOT_FREEBSD)
181 # define CONFIG_API
182 # define CONFIG_CMD_ELF
183 # define CONFIG_SYS_MMC_MAX_DEVICE	1
184 #endif
185 
186 /* Commands */
187 #include <config_cmd_default.h>
188 
189 #define CONFIG_CMD_PING
190 #define CONFIG_CMD_DHCP
191 #define CONFIG_CMD_MII
192 
193 #endif /* __CONFIG_ZYNQ_COMMON_H */
194