| ed948e29 | 05-Sep-2014 |
Khoronzhuk, Ivan <ivan.khoronzhuk@ti.com> |
keystone2: keystone_nav: don't use hard addresses in netcp_pktdma
Use definitions in netcp_pktdma instead direct addresses. The definitions can be set specifically for SoC, so there is no reason to
keystone2: keystone_nav: don't use hard addresses in netcp_pktdma
Use definitions in netcp_pktdma instead direct addresses. The definitions can be set specifically for SoC, so there is no reason to check SoC type while initialization.
Acked-by: Vitaly Andrianov <vitalya@ti.com> Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
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| afa479cf | 05-Sep-2014 |
Khoronzhuk, Ivan <ivan.khoronzhuk@ti.com> |
keystone2: keystone_nav: don't use hard addresses in qm_config
Use definitions in qm_config. The definitions can be set specifically for SoC, so there is no reason to check SoC type while initializa
keystone2: keystone_nav: don't use hard addresses in qm_config
Use definitions in qm_config. The definitions can be set specifically for SoC, so there is no reason to check SoC type while initialization.
Acked-by: Vitaly Andrianov <vitalya@ti.com> Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
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| 41e5ee54 | 22-Oct-2014 |
Stefan Roese <sr@denx.de> |
arm: armada-xp: Add basic support for Marvell Armada XP SoC
This basic support for the Marvell Armada XP is base on the existing kirkwood support. Which has been generatized by moving some common fi
arm: armada-xp: Add basic support for Marvell Armada XP SoC
This basic support for the Marvell Armada XP is base on the existing kirkwood support. Which has been generatized by moving some common files into common marvell locations.
This is in preparation for the upcoming Armada XP MV78460 support.
Signed-off-by: Stefan Roese <sr@denx.de> Tested-by: Luka Perkov <luka@openwrt.org>
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| 96c5f081 | 22-Oct-2014 |
Stefan Roese <sr@denx.de> |
arm: kirkwood: Change naming of dram functions from km_foo() to mvebu_foo()
Additionally the SDRAM address decoding register address is not hard coded in the C code any more. A define is introduced
arm: kirkwood: Change naming of dram functions from km_foo() to mvebu_foo()
Additionally the SDRAM address decoding register address is not hard coded in the C code any more. A define is introduced for this base address.
This makes is possible to use those gpio functions from other MVEBU SoC's as well.
Signed-off-by: Stefan Roese <sr@denx.de> Tested-by: Luka Perkov <luka@openwrt.org> Acked-by: Prafulla Wadaskar <prafulla@marvell.com>
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| 4fd7717e | 22-Oct-2014 |
Stefan Roese <sr@denx.de> |
spi: kirkwood_spi.c: Change KW_SPI_BASE to MVEBU_SPI_BASE
This makes is possible to use this SPI driver from other MVEBU SoC's as well. As the upcoming Armada XP support will do.
Signed-off-by: Ste
spi: kirkwood_spi.c: Change KW_SPI_BASE to MVEBU_SPI_BASE
This makes is possible to use this SPI driver from other MVEBU SoC's as well. As the upcoming Armada XP support will do.
Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> Tested-by: Luka Perkov <luka@openwrt.org> Acked-by: Prafulla Wadaskar <prafulla@marvell.com>
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| d5c5132f | 22-Oct-2014 |
Stefan Roese <sr@denx.de> |
arm: marvell: Extract kirkwood gpio functions into new common file gpio.c
This makes is possible to use those gpio functions from other MVEBU SoC's as well.
Signed-off-by: Stefan Roese <sr@denx.de>
arm: marvell: Extract kirkwood gpio functions into new common file gpio.c
This makes is possible to use those gpio functions from other MVEBU SoC's as well.
Signed-off-by: Stefan Roese <sr@denx.de> Tested-by: Luka Perkov <luka@openwrt.org> Acked-by: Prafulla Wadaskar <prafulla@marvell.com>
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| 22700dc6 | 22-Oct-2014 |
Stefan Roese <sr@denx.de> |
arm: marvell: Rework timer.c to make it usable for other MVEBU platforms
This patch does the following: - Rename defines and registers to not use kirkwood - Remove unused defines - Use clrsetbits()
arm: marvell: Rework timer.c to make it usable for other MVEBU platforms
This patch does the following: - Rename defines and registers to not use kirkwood - Remove unused defines - Use clrsetbits() accessor functions - Coding style cleanup - Clear 25MHZ bit in timer controller register init for Armada XP
There is no functional change for kirkwood. At least not intentionally.
This will be used by the upcoming Armada XP support.
Signed-off-by: Stefan Roese <sr@denx.de> Tested-by: Luka Perkov <luka@openwrt.org> Acked-by: Prafulla Wadaskar <prafulla@marvell.com>
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| 3e972cb9 | 22-Oct-2014 |
Stefan Roese <sr@denx.de> |
arm: marvell: Move arch-kirkwood/spi.h to arch-mvebu/spi.h
This move makes it possible to use this kirkwood SPI driver from other MVEBU platforms as well. This will be used by the upcoming Armada XP
arm: marvell: Move arch-kirkwood/spi.h to arch-mvebu/spi.h
This move makes it possible to use this kirkwood SPI driver from other MVEBU platforms as well. This will be used by the upcoming Armada XP support.
Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> Tested-by: Luka Perkov <luka@openwrt.org> Acked-by: Prafulla Wadaskar <prafulla@marvell.com>
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| 3dc23f78 | 22-Oct-2014 |
Stefan Roese <sr@denx.de> |
arm: marvell: Move arch/kirkwood.h to arch/soc.h
This move makes is possible to use this header not only from kirkwood platforms but from all Marvell mvebu platforms.
Signed-off-by: Stefan Roese <s
arm: marvell: Move arch/kirkwood.h to arch/soc.h
This move makes is possible to use this header not only from kirkwood platforms but from all Marvell mvebu platforms.
Signed-off-by: Stefan Roese <sr@denx.de> Tested-by: Luka Perkov <luka@openwrt.org> Acked-by: Prafulla Wadaskar <prafulla@marvell.com>
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| 4f80a06d | 27-Sep-2014 |
Stephen Warren <swarren@wwwdotorg.org> |
ARM: rpi_b: query internal MAC address from firmware
The built-in SMSC 95xx chip doesn't know its own MAC address. Instead, we must query it from the VC firmware; it's probably encoded in fuses on t
ARM: rpi_b: query internal MAC address from firmware
The built-in SMSC 95xx chip doesn't know its own MAC address. Instead, we must query it from the VC firmware; it's probably encoded in fuses on the BCM2835.
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
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| 41e98e01 | 22-Sep-2014 |
Simon Glass <sjg@chromium.org> |
dm: rpi: Convert GPIO driver to driver model
Convert the BCM2835 GPIO driver to use driver model, and switch over Raspberry Pi to use this, since it is the only board.
Signed-off-by: Simon Glass <s
dm: rpi: Convert GPIO driver to driver model
Convert the BCM2835 GPIO driver to use driver model, and switch over Raspberry Pi to use this, since it is the only board.
Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Stephen Warren <swarren@wwwdotorg.org> Acked-by: Stephen Warren <swarren@wwwdotorg.org>
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| edbf8b4f | 02-Oct-2014 |
Simon Glass <sjg@chromium.org> |
imx: Add error checking to setup_i2c()
Since this function can fail, check its return value.
Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Nikita Kiryanov <nikita@compulab.co.il> |
| fda6fac3 | 14-Oct-2014 |
Simon Glass <sjg@chromium.org> |
dm: tegra: spi: Convert to driver model
This converts the Tegra SPI drivers to use driver model. This is tested on:
- Tegra20 - trimslice - Tegra30 - beaver - Tegra124 - dalmore
(not tested on Teg
dm: tegra: spi: Convert to driver model
This converts the Tegra SPI drivers to use driver model. This is tested on:
- Tegra20 - trimslice - Tegra30 - beaver - Tegra124 - dalmore
(not tested on Tegra124)
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com> Signed-off-by: Simon Glass <sjg@chromium.org>
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| b8809e60 | 21-Oct-2014 |
Simon Glass <sjg@chromium.org> |
dm: exynos: gpio: Convert to driver model
Convert the exynos GPIO driver to driver model. This implements the generic GPIO interface but not the extra Exynos-specific functions.
Signed-off-by: Simo
dm: exynos: gpio: Convert to driver model
Convert the exynos GPIO driver to driver model. This implements the generic GPIO interface but not the extra Exynos-specific functions.
Signed-off-by: Simon Glass <sjg@chromium.org>
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| 903fd795 | 21-Oct-2014 |
Simon Glass <sjg@chromium.org> |
dm: exynos: Tidy up GPIO headers
The wrong header is being included, thus requiring the code to re-declare the generic GPIO interface in each GPIO header.
Fix this.
Signed-off-by: Simon Glass <sjg
dm: exynos: Tidy up GPIO headers
The wrong header is being included, thus requiring the code to re-declare the generic GPIO interface in each GPIO header.
Fix this.
Signed-off-by: Simon Glass <sjg@chromium.org>
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| 8c33ba7b | 10-Oct-2014 |
Marcel Ziswiler <marcel@ziswiler.com> |
ARM: tegra: Use mem size from MC in combination with get_ram_size()
On popular request this now completes the Warren's work started for TK1:
aeb3fcb35956461077804720b8a252d50758d7e0 ARM: tegra: Use
ARM: tegra: Use mem size from MC in combination with get_ram_size()
On popular request this now completes the Warren's work started for TK1:
aeb3fcb35956461077804720b8a252d50758d7e0 ARM: tegra: Use mem size from MC rather than ODMDATA
In addition to the move of using the Tegra memory controller (MC) register rather than ODMDATA for T20, T30 and T114 as well it further uses the generic get_ram_size() function (see "common/memsize.c") <supposed to be used in each and every U-Boot port>TM. Added benefit is that it should <catch 99% of hardware related (i. e. reliably reproducible) memory errors> as well.
Thoroughly tested on the various Toradex line of Tegra modules available which unfortunately does not include T114 and T124 (yet at least) plus on the Jetson TK1.
Based-on-work-by: Stephen Warren <swarren@nvidia.com> Based-on-work-by: Tom Warren <twarren@nvidia.com> Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
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| bf78b271 | 05-Sep-2014 |
Marcel Ziswiler <marcel@ziswiler.com> |
arm: tegra: initial support for apalis t30
This patch adds board support for the Toradex Apalis T30 a computer on module which can be used on different carrier boards.
For the sake of ease of use w
arm: tegra: initial support for apalis t30
This patch adds board support for the Toradex Apalis T30 a computer on module which can be used on different carrier boards.
For the sake of ease of use we do not distinguish between different carrier boards for now as the base module features are deemed sufficient enough for regular booting.
The following functionality is working so far: - eMMC boot and environment storage - Gigabit Ethernet (once Thierry's PCIe as well as my E1000 resp. i210 fixes hit mainline) - MMC/SD cards (both 8-bit as well as 4-bit slot) - USB client/host (dual role port as client e.g. for DFU/UMS, other two ports as host)
Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
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| a5a9fba4 | 30-Sep-2014 |
Eric Nelson <eric.nelson@boundarydevices.com> |
ARM: i.MX video: declare displays and display_count publicly
Declare displays[] and display_count in imx-common/video.h to prevent "Should it be static?" messages when compiling board files with "ma
ARM: i.MX video: declare displays and display_count publicly
Declare displays[] and display_count in imx-common/video.h to prevent "Should it be static?" messages when compiling board files with "make C=1".
Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
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| 3acb011c | 30-Sep-2014 |
Eric Nelson <eric.nelson@boundarydevices.com> |
ARM: i.MX: provide declaration for board_spi_cs_gpio
Provide a public declaration of the board_spi_cs_gpio() callback for i.MX SPI chip selects to prevent the warning "Should it be static?" when com
ARM: i.MX: provide declaration for board_spi_cs_gpio
Provide a public declaration of the board_spi_cs_gpio() callback for i.MX SPI chip selects to prevent the warning "Should it be static?" when compiling with "make C=1".
Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
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| 4ba4a095 | 15-Oct-2014 |
Ruchika Gupta <ruchika.gupta@freescale.com> |
ls102x: configs - Add hash command in freescale LS1 platforms
Hardware accelerated support for SHA-1 and SHA-256 has been added. Hash command enabled along with hardware accelerated support for SHA-
ls102x: configs - Add hash command in freescale LS1 platforms
Hardware accelerated support for SHA-1 and SHA-256 has been added. Hash command enabled along with hardware accelerated support for SHA-1 and SHA-256 for platforms which have CAAM block.
Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
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| 790af815 | 10-Oct-2014 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot/master' into 'u-boot-arm/master' |
| 026330af | 23-Sep-2014 |
Khoronzhuk, Ivan <ivan.khoronzhuk@ti.com> |
ARM: keystone: clock: fix main pll ratio div definitions
The definitions for div ratio supposed to be in hex and were added in dec by mistake.
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com> |
| ebf8644a | 10-Oct-2014 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master' |
| 4b19b744 | 08-Oct-2014 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge remote-tracking branch 'u-boot-imx/master'
The single file conflict below is actually trivial.
Conflicts: board/boundary/nitrogen6x/nitrogen6x.c |
| 311757be | 08-Oct-2014 |
Simon Glass <sjg@chromium.org> |
samsung: Enable device tree for s5p_goni
Change this board to add a device tree.
This also adds a pinmux header file although it is not used as yet.
Signed-off-by: Simon Glass <sjg@chromium.org> S
samsung: Enable device tree for s5p_goni
Change this board to add a device tree.
This also adds a pinmux header file although it is not used as yet.
Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
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