| b1b9d7fb | 01-Jul-2021 |
Zhihuan He <huan.he@rock-chips.com> |
drivers: ram: common: fix ssmod define err
Signed-off-by: Zhihuan He <huan.he@rock-chips.com>
Change-Id: I456f97b959316dde124fd8829e52420399a93fea |
| f627cf25 | 13-Jan-2021 |
Zhihuan He <huan.he@rock-chips.com> |
drivers: ram: rv1126: add split support
The bigger cap must be in low cpu 16bit.
only support high 16bit row < low 16bit row
Signed-off-by: Zhihuan He <huan.he@rock-chips.com>
Change-Id: I0599f6723
drivers: ram: rv1126: add split support
The bigger cap must be in low cpu 16bit.
only support high 16bit row < low 16bit row
Signed-off-by: Zhihuan He <huan.he@rock-chips.com>
Change-Id: I0599f672376ff074ff5192a4d298394e7c89c29e
show more ...
|
| 0367dfef | 13-Jan-2021 |
Zhihuan He <huan.he@rock-chips.com> |
drivers: ram: rv1126: add ssmod support
It can enable ssmod by loader parameter of g_2t_info.
And default is disabled.
Signed-off-by: Zhihuan He <huan.he@rock-chips.com>
Change-Id: I914ddcc33602bdc
drivers: ram: rv1126: add ssmod support
It can enable ssmod by loader parameter of g_2t_info.
And default is disabled.
Signed-off-by: Zhihuan He <huan.he@rock-chips.com>
Change-Id: I914ddcc33602bdc7b67b220bd562f5b16750c79b
show more ...
|
| 00fc4eee | 08-Jun-2021 |
Yifeng Zhao <yifeng.zhao@rock-chips.com> |
rockchip: vendor: Sync vendor id define from Linux
Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Change-Id: I52cc6d87ca19136acfebba52e915911426eb7bb8 |
| e2dc1cc0 | 12-May-2021 |
Wesley Yao <wesley.yao@rock-chips.com> |
drivers: ram: rv1126: Modify tRFC and related timing based on DDR
capacity
Add pctl_modify_trfc() in ddr_set_rate() to modify tRFC, tXS/tXSR,
tXS_ABORT & tXS_FAST based on DDR capacity
Signed-off-b
drivers: ram: rv1126: Modify tRFC and related timing based on DDR
capacity
Add pctl_modify_trfc() in ddr_set_rate() to modify tRFC, tXS/tXSR,
tXS_ABORT & tXS_FAST based on DDR capacity
Signed-off-by: Wesley Yao <wesley.yao@rock-chips.com>
Change-Id: I53649af1a32a4eca49348afbc26d68cd2aec6d3c
show more ...
|
| 706ec1d4 | 07-May-2021 |
Joseph Chen <chenjh@rock-chips.com> |
rockchip: add get_bcb_recovery_msg() to record recovery msg
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: Ifabd4c7d4700c17a16551bd8bdea02ea175b3802 |
| 60410d28 | 15-Apr-2021 |
Elaine Zhang <zhangqing@rock-chips.com> |
rockchip: rk3568: add set_armclk_rate
Support ARM high frequency for fast boot.
Change-Id: If22946894c456853815af2c72996f63cfa350ec5
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com> |
| 5ddf1318 | 07-Apr-2021 |
Wesley Yao <wesley.yao@rock-chips.com> |
cmd: ddr_tool: ddr_dq_eye.c: adjust write DQ eye print range of RK356x
Adjust write DQ eye print range of RK356x so it is the same as read DQ eye.
This avoid the users misunderstanding write DQ eye
cmd: ddr_tool: ddr_dq_eye.c: adjust write DQ eye print range of RK356x
Adjust write DQ eye print range of RK356x so it is the same as read DQ eye.
This avoid the users misunderstanding write DQ eye is smaller.
Signed-off-by: Wesley Yao <wesley.yao@rock-chips.com>
Change-Id: Ia78a1a01f84c15dc0aa876a1b93a99a005314366
show more ...
|
| 563d12f2 | 09-Apr-2021 |
Elaine Zhang <zhangqing@rock-chips.com> |
clk: rockchip: rk3568: add uart clk
Change-Id: I92a097e216e9cbb254c5bae5a25bc52f0c53cd38
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com> |
| 0efe6414 | 01-Mar-2021 |
Tony Xu <tony.xu@rock-chips.com> |
rockchip: boot mode: add dfu boot mode
Signed-off-by: Tony Xu <tony.xu@rock-chips.com>
Change-Id: I965982c71d37f4550be364f5fbcc9ae39b22e3d1 |
| 67a2a1dd | 18-Mar-2021 |
David Wu <david.wu@rock-chips.com> |
clk: rk3328: Implement the gmac2phy clock assignment
Implement the setting parent and rate for gmac2phy clock, and
add internal pll div set for gmac2phy clk.
Change-Id: I6d083a562979c3f9ef71fa581d9
clk: rk3328: Implement the gmac2phy clock assignment
Implement the setting parent and rate for gmac2phy clock, and
add internal pll div set for gmac2phy clk.
Change-Id: I6d083a562979c3f9ef71fa581d90af1b3ecb9aa9
Signed-off-by: David Wu <david.wu@rock-chips.com>
show more ...
|
| 7a110f3a | 24-Mar-2021 |
Wesley Yao <wesley.yao@rock-chips.com> |
Change Flag of DDR DQ Eye Tool
Use DDR_DQ_EYE_FLAG instead of FSP_FLAG to avoid duplicate definition of FAP_FLAG in ddr branch
Signed-off-by: Wesley Yao <wesley.yao@rock-chips.com>
Change-Id: I3bf1
Change Flag of DDR DQ Eye Tool
Use DDR_DQ_EYE_FLAG instead of FSP_FLAG to avoid duplicate definition of FAP_FLAG in ddr branch
Signed-off-by: Wesley Yao <wesley.yao@rock-chips.com>
Change-Id: I3bf16fafc2e46d4002481ed03b5c689f26dccfad
show more ...
|
| c71eeac4 | 18-Mar-2021 |
Wesley Yao <wesley.yao@rock-chips.com> |
cmd: ddr_tool: ddr_dq_eye.c: Add DDR DQ eye tool for RV1126 and RK356x
In the loader, store DDR read & write eye training results.
In U-Boot, use "ddr_dq_eye" command to show DDR DQ eye with the tra
cmd: ddr_tool: ddr_dq_eye.c: Add DDR DQ eye tool for RV1126 and RK356x
In the loader, store DDR read & write eye training results.
In U-Boot, use "ddr_dq_eye" command to show DDR DQ eye with the training
results.
Signed-off-by: Wesley Yao <wesley.yao@rock-chips.com>
Change-Id: Ib360acdc843e3a6a6298d598341176746bf463e9
show more ...
|
| 30567cf7 | 21-Feb-2021 |
Liang Chen <cl@rock-chips.com> |
rockchip: fix compile error for cpu.h
Fixes: 39293fce26 (rockchip: add soc id and version for rk356x)
Change-Id: I58cbd1611423500785c4924a90041d7b9a1d70a2
Signed-off-by: Liang Chen <cl@rock-chips.c
rockchip: fix compile error for cpu.h
Fixes: 39293fce26 (rockchip: add soc id and version for rk356x)
Change-Id: I58cbd1611423500785c4924a90041d7b9a1d70a2
Signed-off-by: Liang Chen <cl@rock-chips.com>
show more ...
|
| 39293fce | 21-Feb-2021 |
Liang Chen <cl@rock-chips.com> |
rockchip: add soc id and version for rk356x
Change-Id: Ib1efa652f2b759cfdd85405b89bd1d1838308ddd
Signed-off-by: Liang Chen <cl@rock-chips.com> |
| c3e08fa0 | 03-Feb-2021 |
Joseph Chen <chenjh@rock-chips.com> |
rockchip: smccc: add sip_smc_amp_cfg()
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: Ida367c95f72e910f6dbb9919888479250512f3b4 |
| c69667e0 | 13-Jan-2021 |
Tang Yun ping <typ@rock-chips.com> |
drivers: ram: sdram_common: add os reg v3 define
Signed-off-by: Tang Yun ping <typ@rock-chips.com>
Change-Id: I2cedcddcebdfd32da113edd1e18d2498b5813e22 |
| 1a6462e1 | 13-Jan-2021 |
Tang Yun ping <typ@rock-chips.com> |
drivers: ram: sdram_common: add 4rank support for sdram_cap_info
Signed-off-by: Tang Yun ping <typ@rock-chips.com>
Change-Id: Icda7bdc73e6c36c1351f0671b374a9d906dafec8 |
| 2bff5c68 | 22-Dec-2020 |
Finley Xiao <finley.xiao@rock-chips.com> |
clk: rockchip: rv1126: Only change APLL rate to 1008MHz for tb
fixes: (c1bad47 clk: rockchip: rv1126: Change APLL rate to 1008MHz)
Change-Id: If0c284af8c5710b43d353fdf6b12b226c288ae07
Signed-off-by
clk: rockchip: rv1126: Only change APLL rate to 1008MHz for tb
fixes: (c1bad47 clk: rockchip: rv1126: Change APLL rate to 1008MHz)
Change-Id: If0c284af8c5710b43d353fdf6b12b226c288ae07
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
show more ...
|
| 3a5404af | 24-Dec-2020 |
Jason Zhu <jason.zhu@rock-chips.com> |
clk: rockchip: rk3568: set the APLL_HZ to 816MHz
Set the APLL_HZ to lower frequency in spl when the pmic is not
available.
Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
Change-Id: Id540ff174e
clk: rockchip: rk3568: set the APLL_HZ to 816MHz
Set the APLL_HZ to lower frequency in spl when the pmic is not
available.
Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
Change-Id: Id540ff174ef93c3d9ea22bb37dc26ca7b587a5b7
show more ...
|
| 355cdcf3 | 23-Dec-2020 |
Zhihuan He <huan.he@rock-chips.com> |
rockchip: rk3308: coding style
Change-Id: If0404baf3019317e2dcf9a6c8a77e8a82a13f888
Signed-off-by: Zhihuan He <huan.he@rock-chips.com> |
| 3c13acb0 | 20-Dec-2020 |
YouMin Chen <cym@rock-chips.com> |
rockchip: sdram_msch: update noc define for rv1126
Change-Id: Ic545cacffabc0c726d6d0de3e6d72a3e6c971849
Signed-off-by: YouMin Chen <cym@rock-chips.com> |
| 5290223f | 20-Dec-2020 |
YouMin Chen <cym@rock-chips.com> |
rockchip: sdram: add define for lpddr4x
Change-Id: Ic7cd740e3498e47ad48376784ca0855d633baf65
Signed-off-by: YouMin Chen <cym@rock-chips.com> |
| de9242dc | 04-Nov-2020 |
Tang Yun ping <typ@rock-chips.com> |
drivers: ram: sdram_common: add 4rank support for rk3568
Change-Id: I179ff4ef1f07a881f76ac086c4ab330e3ff82d73
Signed-off-by: Tang Yun ping <typ@rock-chips.com> |
| 600d0322 | 06-Nov-2020 |
Tang Yun ping <typ@rock-chips.com> |
driver: ram: rockchip: update sdram_pctl_px30.h
1)add ecc define
2)fix some define error
Change-Id: I7a5302c320850c2dc579036841b4b0aebd12e03e
Signed-off-by: Tang Yun ping <typ@rock-chips.com> |