| 9ba18ff8 | 06-Jan-2016 |
Peng Fan <peng.fan@nxp.com> |
imx: mx6ul/sx: fix mmdc_ch0 clk calculation
Check "Figure 19-5. BUS clock generation" of i.MX 6SoloX Applications Processor Reference Manual and "Figure 18-5. BUS clock generation" of i.MX 6UltraLit
imx: mx6ul/sx: fix mmdc_ch0 clk calculation
Check "Figure 19-5. BUS clock generation" of i.MX 6SoloX Applications Processor Reference Manual and "Figure 18-5. BUS clock generation" of i.MX 6UltraLite Applications Processor Reference Manual. If mmdc clk sources from pll4_main_clk(pll_audio), the calculation is wrong.
Fix mmdc_ch0 clk calculation. Also add PLL_AUDIO/VIDEO support for decode_pll.
Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
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| affd4a9f | 22-Jan-2016 |
Simon Glass <sjg@chromium.org> |
rockchip: Tidy up the register-access macros
These work reasonable well, but there are a few errors:
- Brackets should be used to avoid unexpected side-effects - When setting bits, the correspondin
rockchip: Tidy up the register-access macros
These work reasonable well, but there are a few errors:
- Brackets should be used to avoid unexpected side-effects - When setting bits, the corresponding upper 16 bits should be set also
Signed-off-by: Simon Glass <sjg@chromium.org>
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| 1d48ca69 | 30-Nov-2015 |
Heiko Schocher <hs@denx.de> |
arm, ubifs: fix gcc5.x compiler warning
compiling U-Boot for openrd_base_defconfig with gcc 5.x shows the following warning:
CC fs/ubifs/super.o In file included from fs/ubifs/ubifs.h:35:0,
arm, ubifs: fix gcc5.x compiler warning
compiling U-Boot for openrd_base_defconfig with gcc 5.x shows the following warning:
CC fs/ubifs/super.o In file included from fs/ubifs/ubifs.h:35:0, from fs/ubifs/super.c:37: fs/ubifs/super.c: In function 'atomic_inc': ./arch/arm/include/asm/atomic.h:55:2: warning: 'flags' is used uninitialized in this function [-Wuninitialized] local_irq_save(flags); ^ fs/ubifs/super.c: In function 'atomic_dec': ./arch/arm/include/asm/atomic.h:64:2: warning: 'flags' is used uninitialized in this function [-Wuninitialized] local_irq_save(flags); ^ CC fs/ubifs/sb.o [...] CC fs/ubifs/lpt.o In file included from include/linux/bitops.h:123:0, from include/common.h:20, from include/ubi_uboot.h:17, from fs/ubifs/ubifs.h:37, from fs/ubifs/lpt.c:35: fs/ubifs/lpt.c: In function 'test_and_set_bit': ./arch/arm/include/asm/bitops.h:57:2: warning: 'flags' is used uninitialized in this function [-Wuninitialized] local_irq_save(flags); ^ CC fs/ubifs/lpt_commit.o In file included from include/linux/bitops.h:123:0, from include/common.h:20, from include/ubi_uboot.h:17, from fs/ubifs/ubifs.h:37, from fs/ubifs/lpt_commit.c:26: fs/ubifs/lpt_commit.c: In function 'test_and_set_bit': ./arch/arm/include/asm/bitops.h:57:2: warning: 'flags' is used uninitialized in this function [-Wuninitialized] local_irq_save(flags); ^ CC fs/ubifs/scan.o CC fs/ubifs/lprops.o CC fs/ubifs/tnc.o In file included from include/linux/bitops.h:123:0, from include/common.h:20, from include/ubi_uboot.h:17, from fs/ubifs/ubifs.h:37, from fs/ubifs/tnc.c:30: fs/ubifs/tnc.c: In function 'test_and_set_bit': ./arch/arm/include/asm/bitops.h:57:2: warning: 'flags' is used uninitialized in this function [-Wuninitialized] local_irq_save(flags); ^ CC fs/ubifs/tnc_misc.o
Fix it.
Signed-off-by: Heiko Schocher <hs@denx.de>
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| a5b9fa30 | 14-Oct-2015 |
Sergey Temerkhanov <s.temerkhanov@gmail.com> |
armv8: Add Secure Monitor/Hypervisor Call (SMC/HVC) infrastructure
This commit adds functions issuing calls to secure monitor or hypervisore. This allows using services such as Power State Coordinat
armv8: Add Secure Monitor/Hypervisor Call (SMC/HVC) infrastructure
This commit adds functions issuing calls to secure monitor or hypervisore. This allows using services such as Power State Coordination Interface (PSCI) provided by firmware, e.g. ARM Trusted Firmware (ATF)
The SMC call can destroy all registers declared temporary by the calling conventions. The clobber list is "x0..x17" because of this
Signed-off-by: Sergey Temerkhanov <s.temerkhanov@gmail.com> Signed-off-by: Corey Minyard <cminyard@mvista.com> Signed-off-by: Radha Mohan Chintakuntla <rchintakuntla@cavium.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
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| 1222305b | 19-Dec-2015 |
Vladimir Zapolskiy <vz@mleia.com> |
arm: lpc32xx: switch SPL builds to driver model
For NXP LPC32xx boards the change enables SPL_DM option, this allows to use any driver model UART driver in SPL images, hence a restriction on HSUART
arm: lpc32xx: switch SPL builds to driver model
For NXP LPC32xx boards the change enables SPL_DM option, this allows to use any driver model UART driver in SPL images, hence a restriction on HSUART in SPL image is removed and well as definitions for non-DM NS16550 driver, its DM version is used instead.
Because SPL_DM requires malloc(), enable CONFIG_SPL_SYS_MALLOC_SIMPLE for LPC32xx boards.
The change adds about 5KB to the resulting SPL image (for devkit3250 board SPL image is increased from 10672 to 15608 bytes).
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com> Reviewed-by: Simon Glass <sjg@chromium.org>
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| fe21eaf9 | 13-Dec-2015 |
Michael Heimpold <mhei@heimpold.de> |
ARM: mxs: allow boards to select DC-DC switching clock source
For some board designs, it might be useful to switch the DC-DC clock source to something else rather the default 24 MHz, e.g. for EMI re
ARM: mxs: allow boards to select DC-DC switching clock source
For some board designs, it might be useful to switch the DC-DC clock source to something else rather the default 24 MHz, e.g. for EMI reasons.
For this, override the mxs_power_setup_dcdc_clocksource function in your board support files.
Example: void mxs_power_setup_dcdc_clocksource(void) { mxs_power_switch_dcdc_clocksource(POWER_MISC_FREQSEL_20MHZ); }
Signed-off-by: Michael Heimpold <mhei@heimpold.de> Cc: Marek Vasut <marex@denx.de> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Marek Vasut <marex@denx.de>
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