| 1155d555 | 24-Apr-2013 |
Fabio Estevam <fabio.estevam@freescale.com> |
mx53ard: Move register masks into imx-regs.h
imx-regs.h is more appropriate location for containing register masks.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Marek Vasut
mx53ard: Move register masks into imx-regs.h
imx-regs.h is more appropriate location for containing register masks.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Marek Vasut <marex@denx.de>
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| 5ed15738 | 19-Apr-2013 |
Otavio Salvador <otavio@ossystems.com.br> |
wandboard: Add support for Carrier Board MicroSD card
Allow use of the carrier board MicroSD card available in the Wandboard; this allow for loading alternative system from the other card for testin
wandboard: Add support for Carrier Board MicroSD card
Allow use of the carrier board MicroSD card available in the Wandboard; this allow for loading alternative system from the other card for testing or upgrade proposes.
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
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| 08f32f7d | 19-Apr-2013 |
Otavio Salvador <otavio@ossystems.com.br> |
wandboard: Add card detection for SOM MicroSD card
This add support to identify if the card is connected or not; so it does not try to communicate with the controller if no card is available.
Signe
wandboard: Add card detection for SOM MicroSD card
This add support to identify if the card is connected or not; so it does not try to communicate with the controller if no card is available.
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
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| 492938a3 | 17-Apr-2013 |
Fabio Estevam <fabio.estevam@freescale.com> |
nitrogen6x: Setup CCM_CCOSR register
CKO1 drives sgtl5000 codec clock on nitrogen boards and wandboard.
Doing this setup in the bootloader will allow us to remove a lot of code in arch/arm/mach-imx
nitrogen6x: Setup CCM_CCOSR register
CKO1 drives sgtl5000 codec clock on nitrogen boards and wandboard.
Doing this setup in the bootloader will allow us to remove a lot of code in arch/arm/mach-imx/mach-imx6q.c from the mainline kernel.
Also, according to Eric Nelson: "enabling the clock <in the bootloader> will remove squeal after an ungraceful reboot (watchdog) if hooked up to speakers."
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
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| 3f215011 | 17-Apr-2013 |
Philip Paeps <philip@paeps.cx> |
mx35 iomux: correct input select register index
Prior to this fix, calls to mxc_iomux_set_input() for registers after MUX_IN_GPIO2_IN_19 would write to the wrong registers, possibly resulting in une
mx35 iomux: correct input select register index
Prior to this fix, calls to mxc_iomux_set_input() for registers after MUX_IN_GPIO2_IN_19 would write to the wrong registers, possibly resulting in unexpected behaviour.
Signed-off-by: Philip Paeps <philip@paeps.cx>
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| 51f329a7 | 10-Apr-2013 |
Stefan Roese <sr@denx.de> |
arm: imx: Codingstyle enhancement of include/asm/arch-mx6/crm_regs.h
Add spaces before and after "<<".
Please note that I intentionally didn't wrap the > 80 lines for the sake of better readability
arm: imx: Codingstyle enhancement of include/asm/arch-mx6/crm_regs.h
Add spaces before and after "<<".
Please note that I intentionally didn't wrap the > 80 lines for the sake of better readability.
Signed-off-by: Stefan Roese <sr@denx.de>
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| b29ca4a1 | 17-Apr-2013 |
Stefan Roese <sr@denx.de> |
imx: Add titanium board support (i.MX6 based)
Titanium is a i.MX6 based board from ProjectionDesign / Barco. This patch adds support for this board with the newly introduced NAND support for i.MX6.
imx: Add titanium board support (i.MX6 based)
Titanium is a i.MX6 based board from ProjectionDesign / Barco. This patch adds support for this board with the newly introduced NAND support for i.MX6.
Signed-off-by: Stefan Roese <sr@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com>
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| ae695b18 | 15-Apr-2013 |
Stefan Roese <sr@denx.de> |
mtd: mxs_nand: Add support for i.MX6
Signed-off-by: Stefan Roese <sr@denx.de> Acked-by: Scott Wood <scottwood@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Fa
mtd: mxs_nand: Add support for i.MX6
Signed-off-by: Stefan Roese <sr@denx.de> Acked-by: Scott Wood <scottwood@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com>
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| 99193e30 | 09-Apr-2013 |
Stefan Roese <sr@denx.de> |
dma: Add i.MX6 support to drivers/dma/apbh_dma.c
This will be used by the i.MX6 NAND support.
Signed-off-by: Stefan Roese <sr@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Marek Vasut <marex@denx
dma: Add i.MX6 support to drivers/dma/apbh_dma.c
This will be used by the i.MX6 NAND support.
Signed-off-by: Stefan Roese <sr@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com>
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| 8870e459 | 09-Apr-2013 |
Stefan Roese <sr@denx.de> |
imx: Move some i.MX common functions into the imx-common directory
This patch moves the following functions into the imx-common directory:
- mxs_wait_mask_set() - mxs_wait_mask_clr() - mxs_reset_bl
imx: Move some i.MX common functions into the imx-common directory
This patch moves the following functions into the imx-common directory:
- mxs_wait_mask_set() - mxs_wait_mask_clr() - mxs_reset_block()
These are currently used by i.MX28. But the upcoming GPMI NAND port for i.MX6 will also use these functions. So lets move them to a common location to re-use them.
Signed-off-by: Stefan Roese <sr@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com>
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| 0499218d | 09-Apr-2013 |
Stefan Roese <sr@denx.de> |
imx: Move some header files from arch-mxs to imx-common
The following headers are moved to a i.MX common location:
- regs-common.h - regs-apbh.h - regs-bch.h - regs-gpmi.h - dma.h
This way this he
imx: Move some header files from arch-mxs to imx-common
The following headers are moved to a i.MX common location:
- regs-common.h - regs-apbh.h - regs-bch.h - regs-gpmi.h - dma.h
This way this header can be re-used also by other i.MX platforms. For example the i.MX6 which will need it for the upcoming NAND support.
Signed-off-by: Stefan Roese <sr@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com>
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| 25b4aa14 | 10-Apr-2013 |
Fabio Estevam <fabio.estevam@freescale.com> |
mx6: Add solo-lite variant support
mx6 solo-lite is another member of the mx6 series.
For more information about mx6 solo-lite, please visit: http://www.freescale.com/webapp/sps/site/prod_summary.j
mx6: Add solo-lite variant support
mx6 solo-lite is another member of the mx6 series.
For more information about mx6 solo-lite, please visit: http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=i.MX6SL&nodeId=018rH3ZrDRB24A
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
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| dc88403e | 10-Apr-2013 |
Fabio Estevam <fabio.estevam@freescale.com> |
iomux-v3: Place pad control definitions into common file
Instead of having the same PAD control definition in each MX6 variant pin file, place it into a common location.
Signed-off-by: Fabio Esteva
iomux-v3: Place pad control definitions into common file
Instead of having the same PAD control definition in each MX6 variant pin file, place it into a common location.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
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| cd530346 | 21-Apr-2013 |
Stefano Babic <sbabic@denx.de> |
Merge branch 'next' |
| 59efa051 | 10-Apr-2013 |
Stefan Roese <sr@denx.de> |
arm: imx: Change iomux functions to void type
They never return anything also than 0, so lets change the function to void instead.
Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Marek Vasut
arm: imx: Change iomux functions to void type
They never return anything also than 0, so lets change the function to void instead.
Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Marek Vasut <marex@denx.de>
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| 49493cb7 | 10-Apr-2013 |
Tom Warren <twarren@nvidia.com> |
Tegra: Split tegra_get_chip_type() into soc & sku funcs
As suggested by Stephen Warren, use tegra_get_chip() to return the pure CHIPID for a Tegra SoC (i.e. 0x20 for Tegra20, 0x30 for Tegra30, etc.)
Tegra: Split tegra_get_chip_type() into soc & sku funcs
As suggested by Stephen Warren, use tegra_get_chip() to return the pure CHIPID for a Tegra SoC (i.e. 0x20 for Tegra20, 0x30 for Tegra30, etc.) and rename tegra_get_chip_type() to reflect its true function, i.e. tegra_get_chip_sku(), which returns an ID like TEGRA_SOC_T25, TEGRA_SOC_T33, etc.
Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com>
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| b40f734a | 01-Apr-2013 |
Tom Warren <twarren@nvidia.com> |
Tegra114: Initialize System Counter (TSC) with osc frequency
T114 needs the SYSCTR0 counter initialized so the TSC can be read by the kernel. Do it in the bootloader since it's a write-once deal (se
Tegra114: Initialize System Counter (TSC) with osc frequency
T114 needs the SYSCTR0 counter initialized so the TSC can be read by the kernel. Do it in the bootloader since it's a write-once deal (secure/non-secure mode dependent).
Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com>
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| d0edce4f | 25-Mar-2013 |
Tom Warren <twarren@nvidia.com> |
Tegra: Configure L2 cache control reg properly.
Without this change, kernel fails at calling function cache_clean_flush during kernel early boot.
Aprocryphally, intended for T114 only, so I check f
Tegra: Configure L2 cache control reg properly.
Without this change, kernel fails at calling function cache_clean_flush during kernel early boot.
Aprocryphally, intended for T114 only, so I check for a T114 SoC. Works (i.e. dalmore 3.8 kernel now starts printing to console).
Signed-off-by: Tom Warren <twarren@nvidia.com>
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| eb222d1d | 27-Mar-2013 |
Stephen Warren <swarren@nvidia.com> |
ARM: tegra: support T33 SKU of Tegra30
Make U-Boot aware of the T33 SKU of Tegra30, and treat it identically to any other Tegra30.
An alternative would be to simply remove the SKU checking from teg
ARM: tegra: support T33 SKU of Tegra30
Make U-Boot aware of the T33 SKU of Tegra30, and treat it identically to any other Tegra30.
An alternative would be to simply remove the SKU checking from tegra_get_chip_type(); most use of the value most likely simply wants to know the current chip, not the specific SKU. Or, the function could be split into separate tegra_get_chip() and tegra_get_sku() for the cases where differentiation really is required.
I wonder whether tegra_get_chip_type() should printf() whenever any unkown chip/SKU is found, although perhaps the function is called so early that the printf() wouldn't actually make it to the UART anyway.
Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org>
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| 8dc16cf9 | 14-Apr-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot-imx/master' into 'u-boot-arm/master' |
| 0f1411bc | 09-Apr-2013 |
Fabio Estevam <fabio.estevam@freescale.com> |
spi: mxc_spi: Set master mode for all channels
The glitch in the SPI clock line, which commit 3cea335c34 (spi: mxc_spi: Fix spi clock glitch durant reset) solved, is back now and itwas re-introduced
spi: mxc_spi: Set master mode for all channels
The glitch in the SPI clock line, which commit 3cea335c34 (spi: mxc_spi: Fix spi clock glitch durant reset) solved, is back now and itwas re-introduced by commit d36b39bf0d (spi: mxc_spi: Fix ECSPI reset handling).
Actually the glitch is happening due to always toggling between slave mode and master mode by configuring the CHANNEL_MODE bits in this reset function.
Since the spi driver only supports master mode, set the mode for all channels always to master mode in order to have a stable, "glitch-free" SPI clock line.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
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| 86fdb161 | 12-Apr-2013 |
Tom Rini <trini@ti.com> |
am335x: Really correct DDR timings on new BeagleBone part
The previous timings were done on the internal-only A1 board which has different DDR part than all later revs. The timings need a slight ad
am335x: Really correct DDR timings on new BeagleBone part
The previous timings were done on the internal-only A1 board which has different DDR part than all later revs. The timings need a slight adjustment to be correct in all cases with later revs.
Signed-off-by: Tom Rini <trini@ti.com>
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| c97b6df1 | 12-Apr-2013 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge branch 'u-boot-ti/master' into 'u-boot-arm/master' |
| e5323225 | 11-Apr-2013 |
Benoît Thébaudeau <benoit.thebaudeau@advansee.com> |
arm: Remove support for unused s3c64xx
Following the removal of the smdk6400 board, the s3c64xx SoC becomes unused, so remove associated code. It will still be possible to restore it later from the
arm: Remove support for unused s3c64xx
Following the removal of the smdk6400 board, the s3c64xx SoC becomes unused, so remove associated code. It will still be possible to restore it later from the Git history if necessary.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
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| 52587f1e | 11-Apr-2013 |
Benoît Thébaudeau <benoit.thebaudeau@advansee.com> |
arm: Remove support for smdk6400
The migration of boards from Makefile to boards.cfg was due for v2012.03, but smdk6400 did not follow, and it does not build, so move it to scrapyard. It will still
arm: Remove support for smdk6400
The migration of boards from Makefile to boards.cfg was due for v2012.03, but smdk6400 did not follow, and it does not build, so move it to scrapyard. It will still be possible to restore it from the Git history before fixing it.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
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