ARM: tegra: use DT bindings for GPIO namingThere are currently many places that define the list of all Tegra GPIOs;the DT binding header and custom Tegra-specific header file gpio.h. Fixthe redun
ARM: tegra: use DT bindings for GPIO namingThere are currently many places that define the list of all Tegra GPIOs;the DT binding header and custom Tegra-specific header file gpio.h. Fixthe redundancy by replacing everything with the DT binding header file.Signed-off-by: Stephen Warren <swarren@nvidia.com>Reviewed-by: Simon Glass <sjg@chromium.org>Signed-off-by: Tom Warren <twarren@nvidia.com>
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ARM: tegra: Implement clk_mOn currently supported SoCs, clk_m always runs at the same frequency asthe oscillator input. However newer SoC generations such as Tegra210 nolonger have that restricti
ARM: tegra: Implement clk_mOn currently supported SoCs, clk_m always runs at the same frequency asthe oscillator input. However newer SoC generations such as Tegra210 nolonger have that restriction. Prepare for that by separating clk_m fromthe oscillator clock and allow SoC code to override the clk_m rate.Signed-off-by: Thierry Reding <treding@nvidia.com>Signed-off-by: Tom Warren <twarren@nvidia.com>
Tegra: PLL: use per-SoC pllinfo table instead of PLL_DIVM/N/P, etc.Added PLL variables (dividers mask/shift, lock enable/detect, etc.)to new pllinfo struct for each Soc/PLL. PLLA/C/D/E/M/P/U/X.U
Tegra: PLL: use per-SoC pllinfo table instead of PLL_DIVM/N/P, etc.Added PLL variables (dividers mask/shift, lock enable/detect, etc.)to new pllinfo struct for each Soc/PLL. PLLA/C/D/E/M/P/U/X.Used pllinfo struct in all clock functions, validated on T210.Should be equivalent to prior code on T124/114/30/20. Thanksto Marcel Ziswiler for corrections to the T20/T30 values.Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>Signed-off-by: Tom Warren <twarren@nvidia.com>
ARM: Tegra210: Add SoC code/include files for T210All based off of Tegra124. As a Tegra210 board is broughtup, these may change a bit to match the HW more closely,but probably 90% of this is iden
ARM: Tegra210: Add SoC code/include files for T210All based off of Tegra124. As a Tegra210 board is broughtup, these may change a bit to match the HW more closely,but probably 90% of this is identical to T124.Note that since T210 is a 64-bit build, it has no SPLcomponent, and hence no cpu.c for Tegra210.Signed-off-by: Tom Warren <twarren@nvidia.com>
ARM: tegra: pinmux: add Tegra210 supportThis patch incorporates a few fixes from Tom Warren <twarren@nvidia.com>.Signed-off-by: Stephen Warren <swarren@nvidia.com>Signed-off-by: Tom Warren <twar
ARM: tegra: pinmux: add Tegra210 supportThis patch incorporates a few fixes from Tom Warren <twarren@nvidia.com>.Signed-off-by: Stephen Warren <swarren@nvidia.com>Signed-off-by: Tom Warren <twarren@nvidia.com>