| #
13a39725 |
| 14-Oct-2015 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge remote-tracking branch 'u-boot/master'
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| #
aba11d44 |
| 08-Sep-2015 |
Thierry Reding <treding@nvidia.com> |
ARM: tegra124: Clear IDDQ when enabling PLLC
Enabling a PLL while IDDQ is high. The Linux kernel checks for this
condition and warns about it verbosely, so while this seems to work
fine, fix it up a
ARM: tegra124: Clear IDDQ when enabling PLLC
Enabling a PLL while IDDQ is high. The Linux kernel checks for this
condition and warns about it verbosely, so while this seems to work
fine, fix it up according to the programming guidelines provided in
the Tegra K1 TRM (v02p), Section 5.3.8.1 ("PLLC and PLLC4 Startup
Sequence").
Reported-by: Nicolas Chauvet <kwizart@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
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| #
9597494e |
| 14-May-2015 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-tegra
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| #
96e82a25 |
| 15-Apr-2015 |
Simon Glass <sjg@chromium.org> |
tegra124: clock: Add display clocks and functions
Add functions to provide access to the display clocks on Tegra124 including
setting the clock rate for an EDP display.
Signed-off-by: Simon Glass <
tegra124: clock: Add display clocks and functions
Add functions to provide access to the display clocks on Tegra124 including
setting the clock rate for an EDP display.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
show more ...
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| #
a74a4a86 |
| 01-Jan-2015 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-tegra
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| #
a7230745 |
| 10-Dec-2014 |
Thierry Reding <treding@nvidia.com> |
ARM: tegra: Implement tegra_plle_enable()
This function is required by PCIe and SATA. This patch implements it on
Tegra20, Tegra30 and Tegra124. It isn't implemented for Tegra114 because
it doesn't
ARM: tegra: Implement tegra_plle_enable()
This function is required by PCIe and SATA. This patch implements it on
Tegra20, Tegra30 and Tegra124. It isn't implemented for Tegra114 because
it doesn't support PCIe or SATA.
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
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|
| #
1ad6364e |
| 05-Mar-2014 |
Stefano Babic <sbabic@denx.de> |
Merge branch 'master' of git://git.denx.de/u-boot-arm
|
| #
c4d376fd |
| 17-Feb-2014 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-arm
|
| #
999c6baf |
| 24-Jan-2014 |
Tom Warren <twarren.nvidia@gmail.com> |
ARM: tegra: add/edit headers for Tegra124
These headers define the Tegra124 hardware. Add them to the usual
place.
Add Tegra124 chip ID/SKU ID definitions to common headers.
There's no real HW cha
ARM: tegra: add/edit headers for Tegra124
These headers define the Tegra124 hardware. Add them to the usual
place.
Add Tegra124 chip ID/SKU ID definitions to common headers.
There's no real HW change on Tegra124 for 90% of the toys, so it might
make sense for a future patch to unify some of the content of these
files in a common location.
Signed-off-by: Tom Warren <twarren@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
show more ...
|