| #
48d2fc47 |
| 30-Oct-2016 |
Tom Rini <trini@konsulko.com> |
Merge branch 'sun9i-a80-spl' of http://git.denx.de/u-boot-sunxi
|
| #
31633a56 |
| 28-Oct-2016 |
Chen-Yu Tsai <wens@csie.org> |
sunxi: Add support for SID e-fuses on sun9i
The A80 has SID e-fuses. Like other newer SoCs, the actual e-fuses
are at an offset of 0x200 within the SID address space.
Signed-off-by: Chen-Yu Tsai <w
sunxi: Add support for SID e-fuses on sun9i
The A80 has SID e-fuses. Like other newer SoCs, the actual e-fuses
are at an offset of 0x200 within the SID address space.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
show more ...
|
| #
ea1af9f2 |
| 28-Oct-2016 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
sunxi: add gtbus-initialisation for sun9i
On sun9i, the GTBUS manages transaction priority and bandwidth
for multiple read ports when accessing DRAM. The initialisation
mirrors the settings from All
sunxi: add gtbus-initialisation for sun9i
On sun9i, the GTBUS manages transaction priority and bandwidth
for multiple read ports when accessing DRAM. The initialisation
mirrors the settings from Allwinner's boot0 for now, even though
this may not be optimal for all applications (e.g. headless
systems might want to give priority to IO modules).
Adding a common callout to gtbus_init() from the SPL clock init
with a weakly defined implementation in sunxi/clock.c to fallback
to for platforms that don't require this.
[wens@csie.org: Moved gtbus_sun9i.c to arch/arm/mach-sunxi/; style cleanup]
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
show more ...
|
| #
297bb9e0 |
| 28-Oct-2016 |
Philipp Tomsich <philipp.tomsich@theobroma-systems.com> |
sunxi: DRAM initialisation for sun9i
This adds DRAM initialisation code for sun9i, which calculates the
appropriate timings based on timing information for the supplied
DDR3 bin and the clock speeds
sunxi: DRAM initialisation for sun9i
This adds DRAM initialisation code for sun9i, which calculates the
appropriate timings based on timing information for the supplied
DDR3 bin and the clock speeds used.
With this DRAM setup, we have verified DDR3 clocks of up to 792MHz
(i.e. DDR3-1600) on the A80-Q7 using a dual-channel configuration.
[wens@csie.org: Moved dram_sun9i.c to arch/arm/mach-sunxi/; style cleanup]
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
[hdegoede@redhat.com: Drop some huge non-documenting #if 0 ... #endif blocks]
[hdegoede@redhat.com: Fix checkpatch warnings]
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
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|
| #
e1cc4d31 |
| 24-Feb-2015 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Merge remote-tracking branch 'u-boot/master' into 'u-boot-arm/master'
|
| #
e72d3443 |
| 13-Feb-2015 |
Stefano Babic <sbabic@denx.de> |
Merge branch 'master' of git://git.denx.de/u-boot
|
| #
be8ddad9 |
| 02-Feb-2015 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of git://git.denx.de/u-boot-sunxi
|
| #
d35488c7 |
| 26-Jan-2015 |
Hans de Goede <hdegoede@redhat.com> |
sunxi: rsb: Add sun9i (A80 support)
Add support for the A80 to the rsb code.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
|
| #
3b95288a |
| 23-Jan-2015 |
Tom Rini <trini@ti.com> |
Merge branch 'master' of http://git.denx.de/u-boot-sunxi
|
| #
ee74fec8 |
| 13-Jan-2015 |
Hans de Goede <hdegoede@redhat.com> |
sun9i: Add cpu_sun9i.h with iomem defines
Add a headerfile with all the base addresses from the sun9i blocks.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.
sun9i: Add cpu_sun9i.h with iomem defines
Add a headerfile with all the base addresses from the sun9i blocks.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
show more ...
|