ARM: dts: rockchip: fix usb-phy node for px30

Fix the reference clock source for usb-phy on rockchip px30 SoC.

Change-Id: I1a458acd03e21b8824eba24f128bc2fcf0ad306b
Signed-off-by: Frank Wang <frank.

ARM: dts: rockchip: fix usb-phy node for px30

Fix the reference clock source for usb-phy on rockchip px30 SoC.

Change-Id: I1a458acd03e21b8824eba24f128bc2fcf0ad306b
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

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rockchip: dts: px30-evb: enable RK817 pwrkey

Change-Id: Iec05e7d31596c4f84bed523f619022cdda474597
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

rockchip: dts: rk3128: sync the mipi dts compatible name with kernel

Change-Id: I2d32aadbd440219471a2638be415469b1dd49eea
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

rockchip: dts: rk312x: fix otg_vbus_drv pinctrl name

Need to use a different name from host_vbus_drv

Change-Id: Ic62d9d1ef3321367aa1fdd703034a66524df2c9b
Signed-off-by: Kever Yang <kever.yang@rock-

rockchip: dts: rk312x: fix otg_vbus_drv pinctrl name

Need to use a different name from host_vbus_drv

Change-Id: Ic62d9d1ef3321367aa1fdd703034a66524df2c9b
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

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rockchip: bnd-rk3126: enable nandc in pre-relocate

Change-Id: I760012fb26385e68d41fc7dc92cb7e363118d73a
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

rockchip: dts: rk3128: sync pinctrl from kernel

Some pinctrl setting are not correct for rk3128, sync from kernel.

Change-Id: Ib98455ca61ca8a8b19cf2d8134d71ab358ac0a37
Signed-off-by: Kever Yang <ke

rockchip: dts: rk3128: sync pinctrl from kernel

Some pinctrl setting are not correct for rk3128, sync from kernel.

Change-Id: Ib98455ca61ca8a8b19cf2d8134d71ab358ac0a37
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

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rockchip: dts: px30-evb: add rk817 node

Change-Id: Ic861dabfdf84b8893d99a28c67a96e2464c0da83
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

rockchip: dts: px30-evb: add adc-keys

Change-Id: I5978e33200b70510380cecfe232ec47862bff588
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

rockchip: px30: fix clk and pmugrf issue

Change-Id: I481abacc5f69e645b4b3ca2cc5b27bf6cc3a6ca7
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

rockchip: add rv1108 sdram dts

add rv1108 sdram dts,and we can transmit params through dts.

Change-Id: I7d5d1de720205d746db38f69a28e6f3eddc9058d
Signed-off-by: Zhihuan He <huan.he@rock-chips.com>

arm: dts: rockchip: enable quad mode for spi-nor read

Standard read/write mode:

=> sf test 0x8000 0x200000
SPI flash test:
0 erase: 14078 ticks, 145 KiB/s 1.160 Mbps
1 check: 484 ticks, 4231 KiB/s

arm: dts: rockchip: enable quad mode for spi-nor read

Standard read/write mode:

=> sf test 0x8000 0x200000
SPI flash test:
0 erase: 14078 ticks, 145 KiB/s 1.160 Mbps
1 check: 484 ticks, 4231 KiB/s 33.848 Mbps
2 write: 4914 ticks, 416 KiB/s 3.328 Mbps
3 read: 355 ticks, 5769 KiB/s 46.152 Mbps
Test passed
0 erase: 14078 ticks, 145 KiB/s 1.160 Mbps
1 check: 484 ticks, 4231 KiB/s 33.848 Mbps
2 write: 4914 ticks, 416 KiB/s 3.328 Mbps
3 read: 355 ticks, 5769 KiB/s 46.152 Mbps

Quad mode read
Standard mode write:

=> sf test 0x0 0x500000
SPI flash test:
0 erase: 35738 ticks, 143 KiB/s 1.144 Mbps
1 check: 555 ticks, 9225 KiB/s 73.800 Mbps
2 write: 12291 ticks, 416 KiB/s 3.328 Mbps
3 read: 231 ticks, 22164 KiB/s 177.312 Mbps
Test passed
0 erase: 35738 ticks, 143 KiB/s 1.144 Mbps
1 check: 555 ticks, 9225 KiB/s 73.800 Mbps
2 write: 12291 ticks, 416 KiB/s 3.328 Mbps
3 read: 231 ticks, 22164 KiB/s 177.312 Mbps

Change-Id: I39e49778dd503de9836099990fd1186771c08546
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>

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rockchip: dts: px30: add px30-evb dts

Add the dts and header file from kernel.

Change-Id: Iafd91528deffd14f5b59cc3d7cabe9d0dbb576d5
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

rockchip: dts: rk312x: fix emmc and sdmmc pinctrl definition error

Change-Id: Ibdf85e08d7c74d7e9880a631c8ec6d872cb276a0
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

ARM: dts: rk322x: Correct the uart2 pin configuration

Change-Id: I742d6ff8ac70c3d7371d58ee0fe7c59643b97896
Signed-off-by: David Wu <david.wu@rock-chips.com>

rockchip: dts: rk312x: do not enable display in pre-reloc

Change-Id: Ieb6474e8bde5c204ebe1fb505fb1bccfbab73814
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

ARM: dts: rk3126-evb: update charge animation node

Change-Id: I5a1b7042c314481412a1a71454b211a8bd4cd317
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>

rockchip: dts: rk312x: add u-boot.dtsi

Change-Id: Ib5062219be955b84d50952a2dc4f40cf23ac673f
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

rockchip: dts: rk3399-firefly: enable uart2 in spl

pre-loader console in SPL needs UART.

Change-Id: I2db396f00ec8a96452a53be1806ea0ef7aacd990
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

rockchip: dts: rk3288: update spl-boot-order

Use "uboot,spl-boot-orde" instead of "uboot,boot0".

Change-Id: I647500193ab7cd89e7e409b75793a3eff4453d84
Signed-off-by: Kever Yang <kever.yang@rock-chip

rockchip: dts: rk3288: update spl-boot-order

Use "uboot,spl-boot-orde" instead of "uboot,boot0".

Change-Id: I647500193ab7cd89e7e409b75793a3eff4453d84
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

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rockchip: dts: rk3128: update pwm-cell for pwm0

The backlight pwm-cell is 3.

Change-Id: I6fc913189a996f257fbe70194985e7d691fb3bd3
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

UPSTREAM: rockchip: dts: rk3399-puma: add /config/sysreset-gpio property

On the RK3399-Q7, we want to trigger a full platform reset (so the
various software stacks supported don't have to deal with

UPSTREAM: rockchip: dts: rk3399-puma: add /config/sysreset-gpio property

On the RK3399-Q7, we want to trigger a full platform reset (so the
various software stacks supported don't have to deal with the same
complexities over and over again) in case that anything other than a
power-on reset occurred.

To do so, this defines the /config/sysreset-gpio property and has it
point to a GPIO that will perform a power-on reset of the entire
platform.

Change-Id: Ic7e6b6871da4064c8ea4a5e62d5b55dfd80cf3e8
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
(cherry picked from commit 5f104178bf713615dc404fdfcf0fb53d89c66a07)

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UPSTREAM: rockchip: dts: rk3399-puma: add a 'tsd, usb-port-power' stringlist for USB1

USB1 is connected to the on-module USB 3.0 hub and power to the hub
(actually it's a reset signal, modeled as a

UPSTREAM: rockchip: dts: rk3399-puma: add a 'tsd, usb-port-power' stringlist for USB1

USB1 is connected to the on-module USB 3.0 hub and power to the hub
(actually it's a reset signal, modeled as a fixed regulator, that will
be released) should be enabled only during the first probing of the
device to avoid the hub from entering its low-power mode (where it
tries to attach on a fixed interval, but we always miss the timeslot
when U-Boot has the controller listening).

This adds a 'tsd,usb-port-power' stringlist to enable the
infrastructure in the board-specific usb_hub_reset_devices to find and
control the fixed regulator associated with control of the USB hub.

Change-Id: I6624aa6b0a847eb0d26013b5cda5e26edc3630f5
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tested-by: Jakob Unterwurzacher <jakob.unterwurzacher@theobroma-systems.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
(cherry picked from commit 884ad05d34c49ac6c8e21346a63a627c6c9d4c52)

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UPSTREAM: rockchip: dts: rk3399: change sd-card io voltage to 3.0V

The VCC_SD and VCC_SDIO rail should only be powered up to 3.0V on RK3399
platforms.

Change-Id: I4b9adc8001b4d01f0ebd0d5a7a1bc2a050

UPSTREAM: rockchip: dts: rk3399: change sd-card io voltage to 3.0V

The VCC_SD and VCC_SDIO rail should only be powered up to 3.0V on RK3399
platforms.

Change-Id: I4b9adc8001b4d01f0ebd0d5a7a1bc2a050e82647
Signed-off-by: Klaus Goger <klaus.goger@theobroma-systems.com>
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
(cherry picked from commit 4f70039b360ae4645bc35c1d1a6cc41837ea161e)

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UPSTREAM: rockchip: dts: Use defines for pin names in rk3399-puma.dtsi and rk3368-lion.dts

pinctrl/rockchip.h provides defines that map pin numbers to pin names.
Use them to make the dts more human

UPSTREAM: rockchip: dts: Use defines for pin names in rk3399-puma.dtsi and rk3368-lion.dts

pinctrl/rockchip.h provides defines that map pin numbers to pin names.
Use them to make the dts more human readable.

Change-Id: If1e7f9e9bb108f1fceeb32c9220a20eee7acc01d
Signed-off-by: Klaus Goger <klaus.goger@theobroma-systems.com>
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
(cherry picked from commit 366812fa2641da395fbf8e7de532c3c463e7b7d2)

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UPSTREAM: rockchip: dts: rk3399-puma: update USB configuration

This change updates the USB configuration for the RK3399-Q7 in the DTS:
* fixes the OTG board configuration by enabling it ('okay')
*

UPSTREAM: rockchip: dts: rk3399-puma: update USB configuration

This change updates the USB configuration for the RK3399-Q7 in the DTS:
* fixes the OTG board configuration by enabling it ('okay')
* improves the speed of 'usb start' by disabling the unused EHCI/OHCI
controllers

Change-Id: I2ea0f58c8e56ceac065617c8c26007871716273d
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
(cherry picked from commit b1e1ce2cd429c227ef0b2a72b1c13d91ef5555a3)

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