| #
fe84c48e |
| 04-Aug-2017 |
Tom Rini <trini@konsulko.com> |
Merge tag 'xilinx-for-v2017.09' of git://www.denx.de/git/u-boot-microblaze
Xilinx changes for v2017.09
Zynq:
- Add Z-Turn board support
fpga:
- Remove intermediate buffer from code
Zynqmp:
- dts
Merge tag 'xilinx-for-v2017.09' of git://www.denx.de/git/u-boot-microblaze
Xilinx changes for v2017.09
Zynq:
- Add Z-Turn board support
fpga:
- Remove intermediate buffer from code
Zynqmp:
- dts cleanup
- change psu_init handling
- Add options to get silicon version
- Fix time handling
- Map OCM/TCM via MMU
- Add new clock driver
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|
| #
584dc409 |
| 03-Jul-2017 |
Alexander Graf <agraf@suse.de> |
zynq: Add Z-Turn board
The Z-Turn board is a low cost development board based on the
Xilinx Zynq SoC. While it's powerful and quite versatile, it
so far lacked upstream support.
This patch adds bas
zynq: Add Z-Turn board
The Z-Turn board is a low cost development board based on the
Xilinx Zynq SoC. While it's powerful and quite versatile, it
so far lacked upstream support.
This patch adds basic support for the Z-Turn. It does however
for now miss enablement for MIO51 reset which means that USB
and ethernet don't work. For that either FSBL or SPL need to
be adjusted. The SPL part will follow later.
Signed-off-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
show more ...
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