ARM: MX5: Fix broken leftover TO-2 errata workaround

This check was broken. r3 does not contain the silicon revision anymore, so
we need to reload it. Also, this errata only applies to i.MX51.

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ARM: MX5: Fix broken leftover TO-2 errata workaround

This check was broken. r3 does not contain the silicon revision anymore, so
we need to reload it. Also, this errata only applies to i.MX51.

Signed-off-by: David Jander <david@protonic.nl>
Acked-by: Stefano Babic <sbabic@denx.de>

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MX31: Cleanup clock function

The patch provide the same API used with other i.MX
processors and get rid of mx31_ functions.

Signed-off-by: Stefano Babic <sbabic@denx.de>

Remove volatile qualifier in get_ram_size() calls

Checkpatch.pl complains about the volatile qualifier in calls to
get_ram_size(). Remove this qualifier in the prototype and in the
calls where it is

Remove volatile qualifier in get_ram_size() calls

Checkpatch.pl complains about the volatile qualifier in calls to
get_ram_size(). Remove this qualifier in the prototype and in the
calls where it is useless, and leave it only in the function body
where it is needed.

Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>

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ARM: add missing CONFIG_SKIP_LOWLEVEL_INIT for armv7

cpu_init_crit can be skipped, but the code is still enabled requiring a
platform to supply lowlevel_init.

Signed-off-by: Rob Herring <rob.herrin

ARM: add missing CONFIG_SKIP_LOWLEVEL_INIT for armv7

cpu_init_crit can be skipped, but the code is still enabled requiring a
platform to supply lowlevel_init.

Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Cc: Albert ARIBAUD <albert.aribaud@free.fr>

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MX27: Update to autogenerated asm-offsets.h

On i.MX27, the asm-offsets.h file is not yet generated as it should be.

Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Matthias Weisser <weisserm@arco

MX27: Update to autogenerated asm-offsets.h

On i.MX27, the asm-offsets.h file is not yet generated as it should be.

Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Matthias Weisser <weisserm@arcor.de>

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MX5: Update to autogenerated asm-offsets.h

On i.MX5, the asm-offsets.h file is not yet generated as it should be.

Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Matthias Weisser <weisserm@arcor.

MX5: Update to autogenerated asm-offsets.h

On i.MX5, the asm-offsets.h file is not yet generated as it should be.

Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Matthias Weisser <weisserm@arcor.de>

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imx: Add auto generation of asm-offsets.h for imx25

Offsets to registers may be needed in asm code. This patch adds automated
generation of these offsets form C structures.

Signed-off-by: Matthias

imx: Add auto generation of asm-offsets.h for imx25

Offsets to registers may be needed in asm code. This patch adds automated
generation of these offsets form C structures.

Signed-off-by: Matthias Weisser <weisserm@arcor.de>

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imx: Use correct imx25 reset.c

imx25 used the wrong reset.c from imx27

Signed-off-by: Matthias Weisser <weisserm@arcor.de>

imx: Add get_tbclk() function for imx25

Need this function for autoboot keyd

Signed-off-by: Matthias Weisser <weisserm@arcor.de>

mx27: Make the UART port number explicit

mx27_uart_init_pins does the IOMUX setting for UART1 port.

Change the function name to make the UART port number explicit.

Signed-off-by: Fabio Estevam <fa

mx27: Make the UART port number explicit

mx27_uart_init_pins does the IOMUX setting for UART1 port.

Change the function name to make the UART port number explicit.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>

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build: Add targets for auto gen of asm-offsets.h and use it in imx35

asm-offsets.h should be auto generated. This patch adds two rules to rules.mk
which makes this possible and removes the rules on

build: Add targets for auto gen of asm-offsets.h and use it in imx35

asm-offsets.h should be auto generated. This patch adds two rules to rules.mk
which makes this possible and removes the rules on imx35.

Signed-off-by: Matthias Weisser <weisserm@arcor.de>
Acked-by: Stefano Babic <sbabic@denx.de>

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arm920t/at91: add at91rm9200_devices.c

This is a copy of arm926ejs/at91 api for perpherial initialisation.
At the moment we just need the usart part of the api.

Signed-off-by: Andreas Bießmann <and

arm920t/at91: add at91rm9200_devices.c

This is a copy of arm926ejs/at91 api for perpherial initialisation.
At the moment we just need the usart part of the api.

Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>

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arm920t/at91: use new clock.c features

This patch enables the new clock features from arm920t/at91/clock.c. This
is an required step to get at91rm9200_usart replaced by atmel_usart driver.

Signed-o

arm920t/at91: use new clock.c features

This patch enables the new clock features from arm920t/at91/clock.c. This
is an required step to get at91rm9200_usart replaced by atmel_usart driver.

Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Cc: Jens Scharsig <js_at_ng@scharsoft.de>
Cc: Eric Bénard <eric@eukrea.com>

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arm920t/at91: add clock.c

This patch adds an copy of arm926ejs/at91/clock.c to arm920t/at91. The
arm926ejs specialities are removed from arm920t version and vice versa.

Signed-off-by: Andreas Bießm

arm920t/at91: add clock.c

This patch adds an copy of arm926ejs/at91/clock.c to arm920t/at91. The
arm926ejs specialities are removed from arm920t version and vice versa.

Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>

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MX5: Introduce a function for setting the chip select size

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>

OMAP[34]: fix broken timer

As implemented now the timer used to implement __udelay counts
to 0xffffffff and then gets stuck there because the the programmed
reload value is 0xffffffff. This value i

OMAP[34]: fix broken timer

As implemented now the timer used to implement __udelay counts
to 0xffffffff and then gets stuck there because the the programmed
reload value is 0xffffffff. This value is not only wrong but
illegal according to the reference manual.

One can reproduce the bug by leaving a board at the u-boot prompt
for sometime then issuing a sleep command. The sleep will hang
forever.

The timer is a count up timer that reloads as it rolls over
from 0xffffffff so the correct load value is 0.

Change TIMER_LOAD_VAL from 0xffffffff to 0 and introduce
a new constant called TIMER_OVERFLOW_VAL set to 0xffffffff.

Signed-off-by: John Rigby <john.rigby@linaro.org>
Tested-by: Igor Grinberg <grinberg@compulab.co.il>

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armv7: adapt s5pc1xx to the new cache maintenance framework

adapt s5pc1xx to the new layered cache maintenance framework

Signed-off-by: Aneesh V <aneesh@ti.com>

armv7: adapt omap3 to the new cache maintenance framework

adapt omap3 to the new layered cache maintenance framework

Signed-off-by: Aneesh V <aneesh@ti.com>

armv7: adapt omap4 to the new cache maintenance framework

adapt omap4 to the new layered cache maintenance framework

Signed-off-by: Aneesh V <aneesh@ti.com>

armv7: integrate cache maintenance support

- Enable I-cache on bootup
- Enable MMU and D-cache immediately after relocation
- Do necessary initialization before enabling d-cache and MMU
- Changes t

armv7: integrate cache maintenance support

- Enable I-cache on bootup
- Enable MMU and D-cache immediately after relocation
- Do necessary initialization before enabling d-cache and MMU
- Changes to cleanup_before_linux()
- Make changes according to the new framework

Signed-off-by: Aneesh V <aneesh@ti.com>

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armv7: rename cache related CONFIG flags

Replace the cache related CONFIG flags with more meaningful
names. Following are the changes:

CONFIG_L2_OFF -> CONFIG_SYS_L2CACHE_OFF
CONFIG_SYS_NO_ICA

armv7: rename cache related CONFIG flags

Replace the cache related CONFIG flags with more meaningful
names. Following are the changes:

CONFIG_L2_OFF -> CONFIG_SYS_L2CACHE_OFF
CONFIG_SYS_NO_ICACHE -> CONFIG_SYS_ICACHE_OFF
CONFIG_SYS_NO_DCACHE -> CONFIG_SYS_DCACHE_OFF

Signed-off-by: Aneesh V <aneesh@ti.com>
V2:
* Changed CONFIG_L2_OFF -> CONFIG_SYS_NO_L2CACHE
V4:
* Changed all three flags to the final names suggested as above
and accordingly changed the commit message

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armv7: cache maintenance operations for armv7

- Add a framework for layered cache maintenance
- separate out SOC specific outer cache maintenance from
maintenance of caches known to CPU

- Add g

armv7: cache maintenance operations for armv7

- Add a framework for layered cache maintenance
- separate out SOC specific outer cache maintenance from
maintenance of caches known to CPU

- Add generic ARMv7 cache maintenance operations that affect all
caches known to ARMv7 CPUs. For instance in Cortex-A8 these
opertions will affect both L1 and L2 caches. In Cortex-A9
these will affect only L1 cache

- D-cache operations supported:
- Invalidate entire D-cache
- Invalidate D-cache range
- Flush(clean & invalidate) entire D-cache
- Flush D-cache range
- I-cache operations supported:
- Invalidate entire I-cache

- Add maintenance functions for TLB, branch predictor array etc.

- Enable -march=armv7-a so that armv7 assembly instructions can be
used

Signed-off-by: Aneesh V <aneesh@ti.com>

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Minor coding style fixes.

Signed-off-by: Wolfgang Denk <wd@denx.de>

Merge branch 'master' of git://git.denx.de/u-boot-arm

* 'master' of git://git.denx.de/u-boot-arm:
run arm_pci_init after relocation
IXP42x PCI rewrite
update/fix PDNB3 board
update/fix IXDP4

Merge branch 'master' of git://git.denx.de/u-boot-arm

* 'master' of git://git.denx.de/u-boot-arm:
run arm_pci_init after relocation
IXP42x PCI rewrite
update/fix PDNB3 board
update/fix IXDP425 / IXDPG425 boards
add dvlhost (dLAN 200 AV Wireless G) board
IXP NPE: add support for fixed-speed MII ports
update/fix AcTux4 board
update/fix AcTux3 board
update/fix AcTux2 board
update/fix AcTux1 board
use -ffunction-sections / --gc-sections on IXP42x
support CONFIG_SYS_LDSCRIPT on ARM
fix "depend" target in npe directory
Fix IXP code to work after relocation was added
trigger hardware watchdog in IXP42x serial driver
add support for IXP42x Rev. B1 and newer
add XScale sub architecture (IXP/PXA) to maintainer list

Conflicts:
arch/arm/lib/board.c

Signed-off-by: Wolfgang Denk <wd@denx.de>

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IXP NPE: add support for fixed-speed MII ports

Signed-off-by: Michael Schwingen <michael@schwingen.org>