| c1f8750f | 05-Sep-2011 |
Wolfgang Denk <wd@denx.de> |
ARM: remove broken "impa7" board.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: Marius Gröger <mag@sysgo.de> |
| c8f63b41 | 05-Sep-2011 |
Wolfgang Denk <wd@denx.de> |
ARM: remove broken "ep7312" board.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: Marius Gröger <mag@sysgo.de> |
| a4814a69 | 05-Sep-2011 |
Stefano Babic <sbabic@denx.de> |
Makefile : fix generation of cpu related asm-offsets.h
commit 0edf8b5b2fa0d210ebc4d6da0fd1aceeb7e44e47 breaks
building on a different directory with the O= parameter.
The patch wil fix this issue, g
Makefile : fix generation of cpu related asm-offsets.h
commit 0edf8b5b2fa0d210ebc4d6da0fd1aceeb7e44e47 breaks
building on a different directory with the O= parameter.
The patch wil fix this issue, generating always asm-offsets.h before
the other targets.
Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Matthias Weisser <weisserm@arcor.de>
CC: Wolfgang Denk <wd@denx.de>
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| 31c85984 | 10-Jun-2011 |
Eric Benard <eric@eukrea.com> |
dm3730: enable dpll5
which is used to provide 120MHz to USB EHCI
This allows EHCI to work on BeagleBoard XM
Signed-off-by: Eric Bénard <eric@eukrea.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti
dm3730: enable dpll5
which is used to provide 120MHz to USB EHCI
This allows EHCI to work on BeagleBoard XM
Signed-off-by: Eric Bénard <eric@eukrea.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
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| b7e6843f | 04-Sep-2011 |
Sudhakar Rajashekhara <sudhakar.raj@ti.com> |
da8xx: add support for multiple PLL controllers
Modify clk_get() function in cpu file to work for
multiple PLL controllers.
Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
Signed-off-by:
da8xx: add support for multiple PLL controllers
Modify clk_get() function in cpu file to work for
multiple PLL controllers.
Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
Signed-off-by: Nagabhushana Netagunte <nagabhushana.netagunte@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
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| 7dd5a5be | 04-Sep-2011 |
Vaibhav Hiremath <hvaibhav@ti.com> |
omap3:clock: check cpu_family before enabling clks for IVA & CAM
In case of AM3517 and AM3505 (which is OMAP3 varients), IVA2 and
ISP-CAMERA modules have been removed. So add check for cpu_family be
omap3:clock: check cpu_family before enabling clks for IVA & CAM
In case of AM3517 and AM3505 (which is OMAP3 varients), IVA2 and
ISP-CAMERA modules have been removed. So add check for cpu_family before
enabling clocks for these modules, else this impacts subsequent
power consumption and system suspend/resume functionality.
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
Signed-off-by: Ranjith Lohithakshan <ranjithl@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
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| f4dac3e1 | 04-Sep-2011 |
Vaibhav Hiremath <hvaibhav@ti.com> |
omap3:clock: configure GFX clock to 200MHz for AM/DM37x
AM/DM37x is another OMAP3 variant, where the GFX clock has been
boosted to 192MHz/200MHz. So fix the GFX_DIV value for this change.
HW Errata
omap3:clock: configure GFX clock to 200MHz for AM/DM37x
AM/DM37x is another OMAP3 variant, where the GFX clock has been
boosted to 192MHz/200MHz. So fix the GFX_DIV value for this change.
HW Errata: Due to dependency of TV out clock of 54MHz, it is not
possible to configure GFX to 192MHz. So as per HW errats, the
recommended GFX clock is 200MHz (=CORE_CLK/2).
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
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| cabe2878 | 11-Aug-2011 |
Aneesh V <aneesh@ti.com> |
armv7: cache: remove flush on un-aligned invalidate
Remove the flush of boundary cache-lines done as part
of invalidate on a non cache-line boundary aligned
buffer
Also, print a warning when this s
armv7: cache: remove flush on un-aligned invalidate
Remove the flush of boundary cache-lines done as part
of invalidate on a non cache-line boundary aligned
buffer
Also, print a warning when this situation is recognized.
Signed-off-by: Aneesh V <aneesh@ti.com>
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| 882f80b9 | 11-Aug-2011 |
Aneesh V <aneesh@ti.com> |
armv7: stronger barrier for cache-maintenance operations
set-way operations need a DSB after them to ensure the
operation is complete. DMB may not be enough. Use DSB
after all operations instead of
armv7: stronger barrier for cache-maintenance operations
set-way operations need a DSB after them to ensure the
operation is complete. DMB may not be enough. Use DSB
after all operations instead of DMB.
Signed-off-by: Aneesh V <aneesh@ti.com>
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| 13d4f9bd | 11-Aug-2011 |
Aneesh V <aneesh@ti.com> |
omap: enable caches at system start-up
Signed-off-by: Aneesh V <aneesh@ti.com> |
| d07dc499 | 30-Aug-2011 |
Simon Glass <sjg@chromium.org> |
Tegra2: Use clock and pinmux functions to simplify code
Signed-off-by: Simon Glass <sjg@chromium.org> |
| 858bd095 | 30-Aug-2011 |
Simon Glass <sjg@chromium.org> |
Tegra2: Add additional pin multiplexing features
This adds an enum for each pin and some functions for changing the pin
muxing setup.
Signed-off-by: Simon Glass <sjg@chromium.org> |
| b4ba2be8 | 30-Aug-2011 |
Simon Glass <sjg@chromium.org> |
Tegra2: Add more clock support
This adds functions to enable/disable clocks and reset to on-chip peripherals.
Signed-off-by: Simon Glass <sjg@chromium.org> |
| 39d3416f | 30-Aug-2011 |
Simon Glass <sjg@chromium.org> |
Tegra2: Add microsecond timer function
These functions provide access to the high resolution microsecond timer
and tidy up a global variable in the code.
Signed-off-by: Simon Glass <sjg@chromium.or
Tegra2: Add microsecond timer function
These functions provide access to the high resolution microsecond timer
and tidy up a global variable in the code.
Signed-off-by: Simon Glass <sjg@chromium.org>
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| 7acec259 | 17-Aug-2011 |
Stefano Babic <sbabic@denx.de> |
MX: MX35 / MX5: uniform clock command with powerpc
There was already a command to show the processor clocks
for PowerPC (clocks). For i.MX, the "clockinfo" command
was introduce. The patch sets the
MX: MX35 / MX5: uniform clock command with powerpc
There was already a command to show the processor clocks
for PowerPC (clocks). For i.MX, the "clockinfo" command
was introduce. The patch sets the same command name used on
PowerPC.
A nasty and not needed newline is also dropped in the help for
the command.
Signed-off-by: Stefano Babic <sbabic@denx.de>
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| 9db1bfa1 | 13-Jul-2011 |
David Jander <david@protonic.nl> |
ARM: MX51: PLL errata workaround
This is a port of the official PLL errata workaround from Freescale to
mainline u-boot.
The PLL's in the i.MX51 processor can go out of lock due to a metastable
cond
ARM: MX51: PLL errata workaround
This is a port of the official PLL errata workaround from Freescale to
mainline u-boot.
The PLL's in the i.MX51 processor can go out of lock due to a metastable
condition in an analog flip-flop when used at high frequencies.
This workaround implements an undocumented feature in the PLL (dither
mode), which causes the effect of this failure to be much lower (in terms
of frequency deviation), avoiding system failure, or at least decreasing
the likelihood of system failure.
Signed-off-by: David Jander <david@protonic.nl>
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| 080a46ea | 31-Jul-2011 |
Aneesh V <aneesh@ti.com> |
omap: fix gpio related build breaks
Signed-off-by: Aneesh V <aneesh@ti.com>
Acked-by: Dirk Behme <dirk.behme@googlemail.com> |
| 23b3ae0f | 12-Aug-2011 |
Linus Walleij <linus.walleij@linaro.org> |
integrator: convert to new build system
This deletes the integrator split_by_variant.sh script and
defines a number of unique board types for the core modules
that are meaningful to support for the
integrator: convert to new build system
This deletes the integrator split_by_variant.sh script and
defines a number of unique board types for the core modules
that are meaningful to support for the Integrator AP/CP, i.e.
the ones that did not just say "unsupported core module" in
split_by_variant.sh. If more core modules need to be supported
they are easy to add.
We delete all the old cruft in Makefile and MAKEALL that was
working around the old way of building boards. We create a
unique config file per board to satisfy the build system, but
they are just oneliners that include the existing
integratorap.h and integratorcp.h configs.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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| 58fb6020 | 04-Aug-2011 |
Thomas Petazzoni <thomas.petazzoni@free-electrons.com> |
atmel: update at91sam9m10g45 SoC support to new style
Based on earlier work by Alex Waterman <awaterman@dawning.com>.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> |
| fa82f871 | 04-Aug-2011 |
Albert ARIBAUD <albert.u.boot@aribaud.net> |
Convert ISO-8859 files to UTF-8
There was a mix of UTF-8 and ISO-8859 files in the U-Boot source
tree, which could cause issues with the patchwork review system.
This commit converts all ISO-8859 fi
Convert ISO-8859 files to UTF-8
There was a mix of UTF-8 and ISO-8859 files in the U-Boot source
tree, which could cause issues with the patchwork review system.
This commit converts all ISO-8859 files to UTF-8.
Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
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| 7a619ab3 | 01-Aug-2011 |
Matthias Weisser <weisserm@arcor.de> |
arm: auto gen asm-offsets.h for mb86r0x
auto gen asm-offsets.h for mb86r0x
Signed-off-by: Matthias Weisser <weisserm@arcor.de> |
| ffa280fa | 10-Jun-2011 |
Xu, Hong <Hong.Xu@atmel.com> |
AT91: Makes AT91SAM9263 SoC build correctly against u-boot-atmel/master
Rework for AT91SAM9263 SoC, makes it build again.
Based on the work for AT91SAM9260-EK.
Signed-off-by: Hong Xu <hong.xu@atmel
AT91: Makes AT91SAM9263 SoC build correctly against u-boot-atmel/master
Rework for AT91SAM9263 SoC, makes it build again.
Based on the work for AT91SAM9260-EK.
Signed-off-by: Hong Xu <hong.xu@atmel.com>
Signed-off-by: Reinhard Meyer <uboot@emk-elektronik.de>
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| f87353f0 | 01-Aug-2011 |
Xu, Hong <Hong.Xu@atmel.com> |
AT91: Makes AT91SAM9RL SoC build correctly against u-boot-atmel/master
Rework for AT91SAM9RL SoC, makes it build again.
Based on the work for AT91SAM9260-EK.
V4: US->USART, cosmetics
Signed-off-by:
AT91: Makes AT91SAM9RL SoC build correctly against u-boot-atmel/master
Rework for AT91SAM9RL SoC, makes it build again.
Based on the work for AT91SAM9260-EK.
V4: US->USART, cosmetics
Signed-off-by: Hong Xu <hong.xu@atmel.com>
Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
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| 3ad24802 | 26-Jul-2011 |
Asen Dimov <dimov@ronetix.at> |
AT91: change common at91sam9261 files to compile with new scheme
Signed-off-by: Asen Dimov <dimov@ronetix.at>
Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de> |
| b38d634b | 25-Jul-2011 |
Reinhard Meyer <u-boot@emk-elektronik.de> |
AT91: fix mistake in at91sam9260_devices.c(spi1_hw_init)
Bits 0..3 in cs_mask = CS0..CS3 in SPI mode require it to be peripheral
Bits 4..7 in cs_mask = CS0..CS3 in GPIO mode require it to be output
AT91: fix mistake in at91sam9260_devices.c(spi1_hw_init)
Bits 0..3 in cs_mask = CS0..CS3 in SPI mode require it to be peripheral
Bits 4..7 in cs_mask = CS0..CS3 in GPIO mode require it to be output
Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
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