arm, davinci: da850/dm365 lowlevel cleanup

- Cleanup a lot of fix values, and use defines instead.
- Also make some values configurable through the board config
file.
- delete the NAND_SPL code fo

arm, davinci: da850/dm365 lowlevel cleanup

- Cleanup a lot of fix values, and use defines instead.
- Also make some values configurable through the board config
file.
- delete the NAND_SPL code for da850, as it is not used actually
- remove the asm code

Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Wolfgang Denk <hs@denx.de>
Cc: Sandeep Paulraj <s-paulraj@ti.com>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: Tom Rini <tom.rini@gmail.com>
Cc: Christian Riesch <christian.riesch@omicron.at>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>

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omap4/5: Add support for booting with CH.

Configuration header(CH) is 512 byte header attached to an OMAP
boot image that will help ROM code to initialize clocks, SDRAM
etc and copy U-Boot directly

omap4/5: Add support for booting with CH.

Configuration header(CH) is 512 byte header attached to an OMAP
boot image that will help ROM code to initialize clocks, SDRAM
etc and copy U-Boot directly into SDRAM. CH can help us in
by-passing SPL and directly boot U-boot, hence it's an alternative
for SPL. However, we intend to support both CH and SPL for OMAP4/5.

Initialization done through CH is limited and is not equivalent
to that done by SPL. So U-Boot has to distinguish between the
two cases and handle them accordingly. This patch takes care
of doing this.

Signed-off-by: sricharan <r.sricharan@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>

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omap5: emif: Add emif/ddr configurations required for omap5 evm

Add the emif configurations required for omap5 soc.Add the
correct ddr part configurations required for omap5 evm board.
EDB8164B3PH f

omap5: emif: Add emif/ddr configurations required for omap5 evm

Add the emif configurations required for omap5 soc.Add the
correct ddr part configurations required for omap5 evm board.
EDB8164B3PH from ELPIDA is the part used on the board.

Also changes are done to retain some part of the code
common for OMAP4/5 and keep only the remaining in the Soc
specific directories.

Signed-off-by: sricharan <r.sricharan@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>

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omap5: clocks: Add clocks support for omap5 platform.

Adding the correct configurations required for
dplls, clocks, for omap5 Soc.

Also changes are done to retain some part of the code common
for O

omap5: clocks: Add clocks support for omap5 platform.

Adding the correct configurations required for
dplls, clocks, for omap5 Soc.

Also changes are done to retain some part of the code common
for OMAP4/5 and move only the remaining to the Soc specific
directories.

Signed-off-by: sricharan <r.sricharan@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>

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omap5: Add minimal support for omap5430.

This patch adds the minimal support for OMAP5. The platform and machine
specific headers and sources updated for OMAP5430.

OMAP5430 is Texas Instrument's SO

omap5: Add minimal support for omap5430.

This patch adds the minimal support for OMAP5. The platform and machine
specific headers and sources updated for OMAP5430.

OMAP5430 is Texas Instrument's SOC based on ARM Cortex-A15 SMP architecture.
It's a dual core SOC with GIC used for interrupt handling and SCU for cache
coherency.

Also moved some part of code from the basic platform support that can be made
common for OMAP4/5. Rest is kept out seperately. The same approach is followed
for clocks and emif support in the subsequent patches.

Signed-off-by: sricharan <r.sricharan@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>

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omap4: make omap4 code common for future reuse

Much of omap4 soc support code can be reused for omap5.
Move them to the omap-common directory to facilitate
this.

Signed-off-by: sricharan <r.srichar

omap4: make omap4 code common for future reuse

Much of omap4 soc support code can be reused for omap5.
Move them to the omap-common directory to facilitate
this.

Signed-off-by: sricharan <r.sricharan@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>

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mx31: Fix checkpatch warnings in generic.c

Fix checkpatch warnings in generic.c.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>

mx31: Use proper IO accessor for GPR register

Use proper IO accessor for GPR register.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>

mx31: Remove duplicate definition for GPR register

GPR register definition is already available at imx-regs.h, so remove the duplication.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>

mx31: Remove duplicate definition for GPR register

GPR register definition is already available at imx-regs.h, so remove the duplication.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>

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iMX28: Fix ARM vector handling

This patch introduces proper ARM vector handling for i.MX28 CPU. This issue
wasn't addressed because the interrupts weren't enabled on any ARMv5 core,
therefore the is

iMX28: Fix ARM vector handling

This patch introduces proper ARM vector handling for i.MX28 CPU. This issue
wasn't addressed because the interrupts weren't enabled on any ARMv5 core,
therefore the issue wasn't noticed earlier.

In previous implementation, the vectoring code used by i.MX28 CPU when an
exception happened was that of the SPL. With this change, the branch target when
an exception happens can be reconfigured by U-Boot.

Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Detlev Zundel <dzu@denx.de>

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iMX28: Add GPIO control

Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Detlev Zundel <dzu@denx.de>

iMX28: Add PINMUX control

Taken from Linux kernel with minor modifications:

commit bf985969e27b507f734435a99df8bf745a3dbb2b
Author: Shawn Guo <shawn.guo@freescale.com>
Date: Mon Dec 20 22:57:43 2

iMX28: Add PINMUX control

Taken from Linux kernel with minor modifications:

commit bf985969e27b507f734435a99df8bf745a3dbb2b
Author: Shawn Guo <shawn.guo@freescale.com>
Date: Mon Dec 20 22:57:43 2010 +0800

ARM: mxs: Add iomux support

Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Detlev Zundel <dzu@denx.de>

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iMX28: Initial support for iMX28 CPU

This patch supports:
- Timers
- Debug UART
- Clock

Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Wolfgang Denk <wd@d

iMX28: Initial support for iMX28 CPU

This patch supports:
- Timers
- Debug UART
- Clock

Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Detlev Zundel <dzu@denx.de>

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SPL: Allow ARM926EJS to avoid compiling in the CPU support code

This allows the SPL to avoid compiling in the CPU support code.

Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Stefano Babic

SPL: Allow ARM926EJS to avoid compiling in the CPU support code

This allows the SPL to avoid compiling in the CPU support code.

Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Detlev Zundel <dzu@denx.de>
Cc: Scott Wood <scottwood@freescale.com>

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arm: a320: fix broken timer

timer.c used static data and are called before relocation.
Move all static variables into global_data structure. Also cleanup
timer.c from unused stubs and make it truly

arm: a320: fix broken timer

timer.c used static data and are called before relocation.
Move all static variables into global_data structure. Also cleanup
timer.c from unused stubs and make it truly use 64 bit tick values.

Remove reset_timer_masked() get_timer_masked()

reference: arch/arm/cpu/arm926ejs/at91/timer.c

Based on Reinhard Meyer <u-boot@emk-elektronik.de>'s patches
5dca710a3d7703e41da0e9894f2d71f9e25bea6b
cfff263f41e32c7ba2ee9162a8cc6423eb5a8390

Signed-off-by: Po-Yu Chuang <ratbert@faraday-tech.com>
Tested-by: Macpaul Lin <macpaul@gmail.com>

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arm, davinci: Fix setting of the SDRAM configuration register

da850_ddr_setup() expects the BOOTUNLOCK bit to be set in
If BOOTUNLOCK is not set in this define, several configuration
bits will not b

arm, davinci: Fix setting of the SDRAM configuration register

da850_ddr_setup() expects the BOOTUNLOCK bit to be set in
If BOOTUNLOCK is not set in this define, several configuration
bits will not be writeable and the code will not work.

Since the BOOTUNLOCK and TIMUNLOCK bits are not configuration options
but access control bits, this patch changes the code to work
irrespective of the value of these bits in CONFIG_SYS_DA850_DDR2_SDBCR.

Signed-off-by: Christian Riesch <christian.riesch@omicron.at>
Cc: Heiko Schocher <hs@denx.de>
Cc: Paulraj Sandeep <s-paulraj@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>

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arm, davinci: Remove the duplication of LPSC functions

The LPSC functions defined in
arch/arm/cpu/arm926ejs/davinci/da850_lowlevel.c
are replaced by those already defined in
arch/arm/cpu/arm926ejs/d

arm, davinci: Remove the duplication of LPSC functions

The LPSC functions defined in
arch/arm/cpu/arm926ejs/davinci/da850_lowlevel.c
are replaced by those already defined in
arch/arm/cpu/arm926ejs/davinci/psc.c.

Signed-off-by: Christian Riesch <christian.riesch@omicron.at>
Cc: Heiko Schocher <hs@denx.de>
Cc: Paulraj Sandeep <s-paulraj@ti.com>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Acked-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>

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arm, davinci: Rename AM1808 lowlevel functions to DA850

Rename arch/arm/cpu/arm926ejs/davinci/am1808_lowlevel.c and
arch/arm/include/asm/arch-davinci/am1808_lowlevel.h to da850_lowlevel.c
and da850_

arm, davinci: Rename AM1808 lowlevel functions to DA850

Rename arch/arm/cpu/arm926ejs/davinci/am1808_lowlevel.c and
arch/arm/include/asm/arch-davinci/am1808_lowlevel.h to da850_lowlevel.c
and da850_lowlevel.h since they apply not only to the AM1808 SoC
but to all DA850 chips. The function names and #defines are changed
likewise.

Signed-off-by: Christian Riesch <christian.riesch@omicron.at>
Cc: Heiko Schocher <hs@denx.de>
Cc: Paulraj Sandeep <s-paulraj@ti.com>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Acked-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>

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mx53: Turn off child clocks before reconfigure perclk_root

In addition to ensuring that PERCLK remains at least 2.5 times slower
than the AHB clock, certain steps need to be followed to ensure robus

mx53: Turn off child clocks before reconfigure perclk_root

In addition to ensuring that PERCLK remains at least 2.5 times slower
than the AHB clock, certain steps need to be followed to ensure robust
operation of PERCLK when reconfiguring the PERCLK clock source.

To properly configure the PERCLK clock source, the following steps are
required:

1.In the CCGR registers, gate the clocks to all PERCLK-dependent
modules.
2.Select the desired input clock for the PERCLK root clock (to be either
source from the peripherals main source clock or the
lp_apm clock source). Refer to the CMCBR register, perclk_lp_apm_sel bit.
3.Configure the perclk_pred1, perclk_pred2, and perclk_podf dividers
to the desired setting. Refer to the CBCDR register for details.
4.In the CCGR registers, enable the desired clocks for the
PERCLK-dependent module clocks.

If these steps aren't followed, GPT timer may stop and the kernel stops
at "Calibrating delay loop".

Signed-off-by: Terry Lv <r65388@freescale.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>

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arm926ejs, davinci: add cpuinfo for dm365

Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: Sandeep Paulraj <s-paulraj@ti.com>
Signed-off-by: Sandeep Paul

arm926ejs, davinci: add cpuinfo for dm365

Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: Sandeep Paulraj <s-paulraj@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>

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arm, davinci: add lowlevel function for dm365 soc

used for booting (for example) from NAND using spl code.

Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>

arm, davinci: add lowlevel function for dm365 soc

used for booting (for example) from NAND using spl code.

Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: Sandeep Paulraj <s-paulraj@ti.com>
Cc: Christian Riesch <christian.riesch@omicron.at>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>

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arm, davinci: add support for new spl framework

Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: Sandeep Paulraj <s-paulraj@ti.com>
Cc: Scott Wood <scott

arm, davinci: add support for new spl framework

Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: Sandeep Paulraj <s-paulraj@ti.com>
Cc: Scott Wood <scottwood@freescale.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>

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omap/spl: actually enable the console

Currently OMAP SPL code does all the initialization but does not set the
gd->have_console value so no output is actually performed. This patch
sets gd->have_con

omap/spl: actually enable the console

Currently OMAP SPL code does all the initialization but does not set the
gd->have_console value so no output is actually performed. This patch
sets gd->have_console to 1.

Signed-off-by: Ilya Yanok <yanok@emcraft.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>

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arm, arm926: fix missing symbols in NAND_SPL mode

Signed-off-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>

arm, davinci: Add function lpsc_syncreset()

This patch adds a function lpsc_syncreset that allows setting a
lpsc module into Sync Reset state.

Signed-off-by: Christian Riesch <christian.riesch@omic

arm, davinci: Add function lpsc_syncreset()

This patch adds a function lpsc_syncreset that allows setting a
lpsc module into Sync Reset state.

Signed-off-by: Christian Riesch <christian.riesch@omicron.at>
Cc: Heiko Schocher <hs@denx.de>
Cc: Paulraj Sandeep <s-paulraj@ti.com>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Acked-by: Heiko Schocher <hs@denx.de>
Tested-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>

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