| 61698fd5 | 06-Feb-2012 |
Matthias Fuchs <matthias.fuchs@esd.eu> |
mx28: fix SPL code to make USB booting work
This patch fixes booting i.MX28 CPUs via USB download. In this mode the CPU's bootrom implements a USB HID device that accepts a bootstream.
When downloa
mx28: fix SPL code to make USB booting work
This patch fixes booting i.MX28 CPUs via USB download. In this mode the CPU's bootrom implements a USB HID device that accepts a bootstream.
When downloading the bootstream via USB, first the SPL code is received and executed. Then the u-boot image is received and called.
The USB bootmode is interrupt driven.
This patch fixes two things:
1) The ARM's fast interrupt mode is disabled when the SPL code has been run. So save and restore the CPSR register.
2) Save and restore c1 control register: the exception vector location needs to be set back to bootrom space to make the USB interrupts work again. The SPL code needs to change this option for the ram size probing.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu> Acked-by: Marek Vasut <marek.vasut@gmail.com>
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| 534dbd12 | 30-Jan-2012 |
Marek Vasut <marek.vasut@gmail.com> |
i.MX28: Fix VDDIO and VDDA setup
The DC power STS shouldn't be checked if booting off 5V supply.
Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Detlev Zundel
i.MX28: Fix VDDIO and VDDA setup
The DC power STS shouldn't be checked if booting off 5V supply.
Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Detlev Zundel <dzu@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Robert Deliën <robert@delien.nl> Cc: Fabio Estevam <festevam@gmail.com> Cc: Matthias Fuchs <matthias.fuchs@esd.eu>
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| 782bb0d2 | 06-Feb-2012 |
Stefano Babic <sbabic@denx.de> |
MX5/MX6: add missing get_ticks() and get_tbclk()
commit f31a911fe (arm, post: add missing post_time_ms for arm) enables get_ticks and get_tbclk for all arm based boards, MX5/MX6 have not yet impleme
MX5/MX6: add missing get_ticks() and get_tbclk()
commit f31a911fe (arm, post: add missing post_time_ms for arm) enables get_ticks and get_tbclk for all arm based boards, MX5/MX6 have not yet implemented.
Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Dirk Behme <dirk.behme@de.bosch.com> CC: Jason Liu <jason.hui@linaro.org> CC: Marek Vasut <marek.vasut@gmail.com>
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| 60ebcffb | 04-Feb-2012 |
Stefano Babic <sbabic@denx.de> |
MX31: add missing get_tbclk()
Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Helmut Raiger <helmut.raiger@hale.at> |
| 31bb50f8 | 04-Feb-2012 |
Stefano Babic <sbabic@denx.de> |
MX35: add missing get_ticks() and get_tbclk()
commit f31a911fe (arm, post: add missing post_time_ms for arm) enables get_ticks and get_tbclk for all arm based boards, MX5/MX6 have not yet implemente
MX35: add missing get_ticks() and get_tbclk()
commit f31a911fe (arm, post: add missing post_time_ms for arm) enables get_ticks and get_tbclk for all arm based boards, MX5/MX6 have not yet implemented.
Signed-off-by: Stefano Babic <sbabic@denx.de>
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| 6b873dca | 02-Feb-2012 |
Sughosh Ganu <urwithsughosh@gmail.com> |
Changes to move hawkboard to the new spl infrastructure
This patch moves hawkboard to the new spl infrastructure from the older nand_spl one.
Removed the hawkboard_nand_config build option -- The s
Changes to move hawkboard to the new spl infrastructure
This patch moves hawkboard to the new spl infrastructure from the older nand_spl one.
Removed the hawkboard_nand_config build option -- The spl code now gets compiled with hawkboard_config, after building the main u-boot image, using the CONFIG_SPL_TEXT_BASE. Modified the README.hawkboard to reflect the same.
Signed-off-by: Sughosh Ganu <urwithsughosh@gmail.com> Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Heiko Schocher <hs@denx.de> Cc: Christian Riesch <christian.riesch@omicron.at> Cc: Sudhakar Rajashekhara <sudhakar.raj@ti.com> Cc: Tom Rini <trini@ti.com> Acked-by: Christian Riesch <christian.riesch@omicron.at>
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| d735a99d | 02-Feb-2012 |
Christian Riesch <christian.riesch@omicron.at> |
arm, arm926ejs: Enable icache only if CONFIG_SYS_ICACHE_OFF is not defined
Signed-off-by: Christian Riesch <christian.riesch@omicron.at> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <
arm, arm926ejs: Enable icache only if CONFIG_SYS_ICACHE_OFF is not defined
Signed-off-by: Christian Riesch <christian.riesch@omicron.at> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@ti.com> Acked-by: Heiko Schocher <hs@denx.de> Tested-by: Heiko Schocher <hs@denx.de>
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| b67d8816 | 02-Feb-2012 |
Christian Riesch <christian.riesch@omicron.at> |
arm, arm926ejs: Add option CONFIG_SYS_EXCEPTION_VECTORS_HIGH
The V bit of the c1 register of CP15 should not be cleared on DA850 SoCs since they have no valid memory at 0x00000000. This patch introd
arm, arm926ejs: Add option CONFIG_SYS_EXCEPTION_VECTORS_HIGH
The V bit of the c1 register of CP15 should not be cleared on DA850 SoCs since they have no valid memory at 0x00000000. This patch introduces a configuration option CONFIG_SYS_EXCEPTION_VECTORS_HIGH that allows setting the correct value for the V bit.
Signed-off-by: Christian Riesch <christian.riesch@omicron.at> Reported-by: Sughosh Ganu <urwithsughosh@gmail.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@ti.com> Cc: Sughosh Ganu <urwithsughosh@gmail.com> Cc: Heiko Schocher <hs@denx.de>
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| da104e04 | 02-Feb-2012 |
Sughosh Ganu <urwithsughosh@gmail.com> |
arm, arm926ejs: Flush the data cache before disabling it
The current implementation invalidates the data cache before turning it off and causes problems on the hawkboard. See the discussion in http:
arm, arm926ejs: Flush the data cache before disabling it
The current implementation invalidates the data cache before turning it off and causes problems on the hawkboard. See the discussion in http://lists.denx.de/pipermail/u-boot/2012-January/115212.html
According to the ARM926EJ-S Technical Reference Manual, the cache should be flushed instead.
Also fix the comments to match code.
Signed-off-by: Sughosh Ganu <urwithsughosh@gmail.com>
Rebased and corrected commit message.
Signed-off-by: Christian Riesch <christian.riesch@omicron.at> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@ti.com> Acked-by: Heiko Schocher <hs@denx.de> Tested-by: Heiko Schocher <hs@denx.de>
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| 27b66622 | 02-Feb-2012 |
Christian Riesch <christian.riesch@omicron.at> |
arm, arm926ejs: Do cpu critical inits only for boards that require it
This patch reverts commit ca4b55800ed74207c35271bf7335a092d4955416 "arm, arm926ejs: always do cpu critical inits" since it impac
arm, arm926ejs: Do cpu critical inits only for boards that require it
This patch reverts commit ca4b55800ed74207c35271bf7335a092d4955416 "arm, arm926ejs: always do cpu critical inits" since it impacts all arm926ejs based configurations and caused problems, e.g., with the hawkboard.
Instead the patch removes the CONFIG_SKIP_LOWLEVEL_INIT defines from the board configurations that need low level initialization.
Signed-off-by: Christian Riesch <christian.riesch@omicron.at> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@ti.com> Cc: Heiko Schocher <hs@denx.de> Acked-by: Heiko Schocher <hs@denx.de> Tested-by: Heiko Schocher <hs@denx.de>
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| eb935242 | 02-Feb-2012 |
Christian Riesch <christian.riesch@omicron.at> |
arm, davinci: Add lowlevel_init for SoCs other than DM644X
The low level initialization code in arch/arm/cpu/arm926ejs/davinci/lowlevel_init.S was written for DM644X SoCs only. This patch makes the
arm, davinci: Add lowlevel_init for SoCs other than DM644X
The low level initialization code in arch/arm/cpu/arm926ejs/davinci/lowlevel_init.S was written for DM644X SoCs only. This patch makes the lowlevel_init function in this file a dummy function for SoCs other than DM644X.
Signed-off-by: Christian Riesch <christian.riesch@omicron.at> Cc: Tom Rini <trini@ti.com> Cc: Sergey Kubushyn <ksi@koi8.net> Acked-by: Heiko Schocher <hs@denx.de> Tested-by: Heiko Schocher <hs@denx.de>
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| c8ff6a9e | 06-Feb-2012 |
Aneesh V <aneesh@ti.com> |
OMAP4460: Reduce MPU clock speed from 920 to 700
We do not have thermal management or Smartreflex enabled at U-Boot level. So, it's better to stick to OPP100 for MPU instead of the OPP Turbo that is
OMAP4460: Reduce MPU clock speed from 920 to 700
We do not have thermal management or Smartreflex enabled at U-Boot level. So, it's better to stick to OPP100 for MPU instead of the OPP Turbo that is used now. Adjust the VDD_MPU accordingly.
Tested-by: Sebastien Jan <s-jan@ti.com> Signed-off-by: Aneesh V <aneesh@ti.com>
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| 8f5d4687 | 06-Feb-2012 |
Hadli, Manjunath <manjunath.hadli@ti.com> |
davinci: add support for printing clock frequency
add support for printing various clock frequency info found in SOC such as ARM core frequency, DSP core frequency and DDR frequency as part of bdinf
davinci: add support for printing clock frequency
add support for printing various clock frequency info found in SOC such as ARM core frequency, DSP core frequency and DDR frequency as part of bdinfo command.
Signed-off-by: Manjunath Hadli <manjunath.hadli@ti.com> Cc: Tom Rini <trini@ti.com>
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| 6678cebc | 06-Feb-2012 |
Hadli, Manjunath <manjunath.hadli@ti.com> |
davinci: remove macro CONFIG_DISPLAY_CPUINFO
remove the macro CONFIG_DISPLAY_CPUINFO as it is no longer required. This is because clock info will be printed as part 'bdinfo' command and also remove
davinci: remove macro CONFIG_DISPLAY_CPUINFO
remove the macro CONFIG_DISPLAY_CPUINFO as it is no longer required. This is because clock info will be printed as part 'bdinfo' command and also remove support print_cpuinfo() as it will no longer be called.
Signed-off-by: Manjunath Hadli <manjunath.hadli@ti.com> Cc: Tom Rini <trini@ti.com>
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| a4958313 | 02-Feb-2012 |
Peter Meerwald <p.meerwald@bct-electronic.com> |
omap3: fix comment typos
Signed-off-by: Peter Meerwald <p.meerwald@bct-electronic.com> |
| 860004c1 | 06-Feb-2012 |
Govindraj.R <govindraj.raja@ti.com> |
OMAP4: clock-common: Move the usb dppl configuration to new func
usb dpll configuration is done only part of non-essential dppl configuration however if CONFIG_USB_EHCI_OMAP is defined we may have t
OMAP4: clock-common: Move the usb dppl configuration to new func
usb dpll configuration is done only part of non-essential dppl configuration however if CONFIG_USB_EHCI_OMAP is defined we may have to configure usb dpll's for proper functioning of usb modules. So move the usb dppl configuration to a new func. and utilise the same during essential dpll configuration.
Signed-off-by: Govindraj.R <govindraj.raja@ti.com> Tested-by: Stefano Babic <sbabic@denx.de>
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| 95f87910 | 06-Feb-2012 |
Govindraj.R <govindraj.raja@ti.com> |
OMAP3+: Clock: Adding ehci clock enabling
Adding ehci clock enabling mechanism part of clock framework. When essential clocks are enabled during init phase usb host clocks can also be enabled from c
OMAP3+: Clock: Adding ehci clock enabling
Adding ehci clock enabling mechanism part of clock framework. When essential clocks are enabled during init phase usb host clocks can also be enabled from clock framework.
Acked-by: Igor Grinberg <grinberg@compulab.co.il> Signed-off-by: Govindraj.R <govindraj.raja@ti.com> Tested-by: Stefano Babic <sbabic@denx.de>
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| 37bb6d89 | 05-Feb-2012 |
Chander Kashyap <chander.kashyap@linaro.org> |
ARM: EXYNOS: Add support for Exynos5 based SoCs
Samsung's ARM Cortex-A15 based SoCs are known as Exynos5 series of SoCs. This patch adds the support for Exynos5.
Signed-off-by: Chander Kashyap <cha
ARM: EXYNOS: Add support for Exynos5 based SoCs
Samsung's ARM Cortex-A15 based SoCs are known as Exynos5 series of SoCs. This patch adds the support for Exynos5.
Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
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| 5e46f83c | 05-Feb-2012 |
Chander Kashyap <chander.kashyap@linaro.org> |
Exynos: Clock.c: Use CONFIG_SYS_CLK_FREQ macro
CONFIG_SYS_CLK_FREQ_C210 macro giving notion of S5PC2XX (Exynos4) architecture. Replace CONFIG_SYS_CLK_FREQ_C210 with CONFIG_SYS_CLK_FREQ to make it ge
Exynos: Clock.c: Use CONFIG_SYS_CLK_FREQ macro
CONFIG_SYS_CLK_FREQ_C210 macro giving notion of S5PC2XX (Exynos4) architecture. Replace CONFIG_SYS_CLK_FREQ_C210 with CONFIG_SYS_CLK_FREQ to make it generic for exynos architecture.
Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
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| 851db35e | 18-Jan-2012 |
Minkyu Kang <mk7.kang@samsung.com> |
S5P: support generic watchdog timer
This patch adds support the generic watchdog timer for s5pc1xx and exynos4
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> Signed-off-by: Kyungmin Park <kyungm
S5P: support generic watchdog timer
This patch adds support the generic watchdog timer for s5pc1xx and exynos4
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Cc: HeungJun, Kim <riverful.kim@samsung.com>
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| db68bc2c | 18-Dec-2011 |
Chander Kashyap <chander.kashyap@linaro.org> |
Exynos: Fix ARM Clock frequency calculation
Earliar ARM clock frequency was calculated by: MOUTAPLL/(DIVAPLL + 1) which is actually returning SCLKAPLL. It is fixed by calculating it as follows: ARMC
Exynos: Fix ARM Clock frequency calculation
Earliar ARM clock frequency was calculated by: MOUTAPLL/(DIVAPLL + 1) which is actually returning SCLKAPLL. It is fixed by calculating it as follows: ARMCLK=MOUTCORE / (DIVCORE + 1) / (DIVCORE2 + 1)
Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
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| 96f5c4b2 | 08-Feb-2012 |
Prafulla Wadaskar <prafulla@marvell.com> |
bugfix: all Marvell specific build fails due to undefined reference to `get_ticks'
after http://patchwork.ozlabs.org/patch/136415/ was applied. All Marvell build fails with below error
common/libco
bugfix: all Marvell specific build fails due to undefined reference to `get_ticks'
after http://patchwork.ozlabs.org/patch/136415/ was applied. All Marvell build fails with below error
common/libcommon.o: In function `cread_line': /home/uboot/src/u-boot-arm/common/main.c:717: undefined reference to `get_ticks' /home/uboot/src/u-boot-arm/common/main.c:717: undefined reference to `get_tbclk' /home/uboot/src/u-boot-arm/common/main.c:720: undefined reference to `get_ticks'
The same is fixed for Kirkwood, ARMADA100, pantheon and orion5x SoCs
Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
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| 67953027 | 06-Feb-2012 |
Michael Walle <[michael@walle.cc]> |
arm, arm-kirkwood: disable l2c before linux boot
The decompressor expects the L2 cache to be disabled. This fixes booting some kernels, which have CONFIG_ARM_PATCH_PHYS_VIRT enabled.
Signed-off-by:
arm, arm-kirkwood: disable l2c before linux boot
The decompressor expects the L2 cache to be disabled. This fixes booting some kernels, which have CONFIG_ARM_PATCH_PHYS_VIRT enabled.
Signed-off-by: Michael Walle <michael@walle.cc> Acked-by: Prafulla Wadaskar <prafulla@marvell.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Prafulla Wadaskar <prafulla@marvell.com> Cc: Wolfgang Denk <wd@denx.de>
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| 0d8a7499 | 31-Jan-2012 |
Jason Liu <jason.hui@linaro.org> |
i.mx: i.mx5: update imx_get_mac_from_fuse function
FEC does not work on the i.mx51/53evk board, it will hangup In: serial Out: serial Err: serial Net:
After bisect, it due to the following c
i.mx: i.mx5: update imx_get_mac_from_fuse function
FEC does not work on the i.mx51/53evk board, it will hangup In: serial Out: serial Err: serial Net:
After bisect, it due to the following commit: be252b6 net: imx: Add multi-FEC support for imx_get_mac_from_fuse has change the imx_get_mac_from_fuse fucntion prototype, but fail to update i.mx5, here it does it.
After apply this patch, u-boot works again on i.mx51/53 evk boards.
Signed-off-by: Jason Liu <jason.hui@linaro.org> Cc: Stefano Babic <sbabic@denx.de> Acked-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Stefano Babic <sbabic@denx.de>
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| 82182720 | 22-Jan-2012 |
Fabio Estevam <festevam@gmail.com> |
mx28: Show CPU frequency
Showing CPU frequency during boot is useful information.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Marek Vasut <marek.vasut@gmail.com> Acked-by:
mx28: Show CPU frequency
Showing CPU frequency during boot is useful information.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Marek Vasut <marek.vasut@gmail.com> Acked-by: Stefano Babic <sbabic@denx.de>
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